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Searched refs:SegReg (Results 1 – 5 of 5) sorted by relevance

/llvm-project-15.0.7/llvm/lib/Target/X86/AsmParser/
H A DX86Operand.h63 unsigned SegReg; member
154 if (Mem.SegReg) in print()
155 OS << ",SegReg=" << X86IntelInstPrinter::getRegisterName(Mem.SegReg); in print()
191 return Mem.SegReg; in getMemSegReg()
687 Res->Mem.SegReg = 0;
706 CreateMem(unsigned ModeSize, unsigned SegReg, const MCExpr *Disp,
715 assert((SegReg || BaseReg || IndexReg || DefaultBaseReg) &&
722 Res->Mem.SegReg = SegReg;
H A DX86AsmParser.cpp1132 bool ParseMemOperand(unsigned SegReg, const MCExpr *Disp, SMLoc StartLoc,
1138 bool CreateMemForMSInlineAsm(unsigned SegReg, const MCExpr *Disp,
1714 FinalOp.Mem.SegReg = OrigOp.Mem.SegReg; in VerifyAndAdjustOperands()
1744 unsigned SegReg, const MCExpr *Disp, unsigned BaseReg, unsigned IndexReg, in CreateMemForMSInlineAsm() argument
1788 getPointerWidth(), SegReg, Disp, BaseReg, IndexReg, Scale, Start, End, in CreateMemForMSInlineAsm()
2880 bool X86AsmParser::ParseMemOperand(unsigned SegReg, const MCExpr *Disp, in ParseMemOperand() argument
2956 if (SegReg == 0) in ParseMemOperand()
2960 Operands.push_back(X86Operand::CreateMem(getPointerWidth(), SegReg, Disp, in ParseMemOperand()
3044 if (BaseReg == X86::DX && IndexReg == 0 && Scale == 1 && SegReg == 0 && in ParseMemOperand()
3055 if (SegReg || BaseReg || IndexReg) in ParseMemOperand()
[all …]
/llvm-project-15.0.7/llvm/lib/Target/X86/MCTargetDesc/
H A DX86MCTargetDesc.cpp648 const MCOperand &SegReg = Inst.getOperand(MemOpStart + X86::AddrSegmentReg); in evaluateMemoryOperandAddress() local
653 if (SegReg.getReg() != 0 || IndexReg.getReg() != 0 || ScaleAmt.getImm() != 1 || in evaluateMemoryOperandAddress()
674 const MCOperand &SegReg = Inst.getOperand(MemOpStart + X86::AddrSegmentReg); in getMemoryOperandRelocationOffset() local
680 if (BaseReg.getReg() != X86::RIP || SegReg.getReg() != 0 || in getMemoryOperandRelocationOffset()
/llvm-project-15.0.7/llvm/lib/Target/X86/
H A DX86AsmPrinter.cpp389 const MachineOperand &SegReg = MI->getOperand(OpNo + X86::AddrSegmentReg); in PrintIntelMemReference() local
404 if (SegReg.getReg()) { in PrintIntelMemReference()
/llvm-project-15.0.7/llvm/lib/CodeGen/GlobalISel/
H A DLegalizerHelper.cpp5228 Register SegReg = SrcRegs[i]; in narrowScalarExtract() local
5231 SegReg = MRI.createGenericVirtualRegister(LLT::scalar(SegSize)); in narrowScalarExtract()
5232 MIRBuilder.buildExtract(SegReg, SrcRegs[i], ExtractOffset); in narrowScalarExtract()
5235 DstRegs.push_back(SegReg); in narrowScalarExtract()
5308 Register SegReg = OpReg; in narrowScalarInsert() local
5311 SegReg = MRI.createGenericVirtualRegister(LLT::scalar(SegSize)); in narrowScalarInsert()
5312 MIRBuilder.buildExtract(SegReg, OpReg, ExtractOffset); in narrowScalarInsert()
5316 MIRBuilder.buildInsert(DstReg, SrcReg, SegReg, InsertOffset); in narrowScalarInsert()