| /llvm-project-15.0.7/llvm/lib/CodeGen/ |
| H A D | TargetSchedule.cpp | 39 return EnableSchedModel && SchedModel.hasInstrSchedModel(); in hasInstrSchedModel()
64 SchedModel = TSInfo->getSchedModel(); in init()
68 unsigned NumRes = SchedModel.getNumProcResourceKinds(); in init()
70 ResourceLCM = SchedModel.IssueWidth; in init()
76 MicroOpFactor = ResourceLCM / SchedModel.IssueWidth; in init()
146 SCDesc = SchedModel.getSchedClassDesc(SchedClass); in resolveSchedClass()
188 return TII->defaultDefLatency(SchedModel, *DefMI); in computeOperandLatency()
242 && SchedModel.isComplete()) { in computeOperandLatency()
285 return TII->defaultDefLatency(SchedModel, *MI); in computeInstrLatency()
291 if (!SchedModel.isOutOfOrder()) in computeOutputLatency()
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| H A D | MachineScheduler.cpp | 2021 if (!SchedModel->hasInstrSchedModel()) in init()
2027 * SchedModel->getMicroOpFactor(); in init()
2042 SchedModel = smodel; in init()
2901 SchedModel = DAG->getSchedModel(); in initialize()
2907 Rem.init(DAG, SchedModel); in initialize()
2908 Top.init(DAG, SchedModel, &Rem); in initialize()
2909 Bot.init(DAG, SchedModel, &Rem); in initialize()
3013 SchedModel->getMicroOpBufferSize() * SchedModel->getMicroOpFactor(); in checkAcyclicLatency()
3514 SchedModel = DAG->getSchedModel(); in initialize()
3517 Rem.init(DAG, SchedModel); in initialize()
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| H A D | MachineTraceMetrics.cpp | 73 SchedModel.init(&ST); in runOnMachineFunction()
109 unsigned PRKinds = SchedModel.getNumProcResourceKinds(); in getResources()
120 if (!SchedModel.hasInstrSchedModel()) in getResources()
127 PI = SchedModel.getWriteProcResBegin(SC), in getResources()
139 PRCycles[K] * SchedModel.getResourceFactor(K); in getResources()
148 unsigned PRKinds = SchedModel.getNumProcResourceKinds(); in getProcResourceCycles()
160 unsigned PRKinds = MTM.SchedModel.getNumProcResourceKinds(); in Ensemble()
178 unsigned PRKinds = MTM.SchedModel.getNumProcResourceKinds(); in computeDepthResources()
803 DepCycle += MTM.SchedModel in updateDepth()
1217 if (unsigned IW = TE.MTM.SchedModel.getIssueWidth()) in getResourceDepth()
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| H A D | VLIWMachineScheduler.cpp | 67 : TII(STI.getInstrInfo()), SchedModel(SM) { in VLIWResourceModel()
74 Packet.reserve(SchedModel->getIssueWidth()); in VLIWResourceModel()
156 Packet.size() >= SchedModel->getIssueWidth()) { in reserveResources()
272 SchedModel = DAG->getSchedModel(); in initialize()
274 Top.init(DAG, SchedModel); in initialize()
275 Bot.init(DAG, SchedModel); in initialize()
307 return new VLIWResourceModel(STI, SchedModel); in createVLIWResourceModel()
365 unsigned uops = SchedModel->getNumMicroOps(SU->getInstr()); in checkHazard()
366 if (IssueCount + uops > SchedModel->getIssueWidth()) in checkHazard()
388 unsigned Width = SchedModel->getIssueWidth(); in bumpCycle()
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| H A D | ScheduleDAGInstrs.cpp | 117 SchedModel.init(&ST); in ScheduleDAGInstrs()
268 Dep.setLatency(SchedModel.computeOperandLatency(SU->getInstr(), OperIdx, in addPhysRegDataDeps()
312 SchedModel.computeOutputLatency(MI, OperIdx, DefSU->getInstr())); in addPhysRegDeps()
437 Dep.setLatency(SchedModel.computeOperandLatency(MI, OperIdx, Use, in addVRegDefDeps()
481 SchedModel.computeOutputLatency(MI, OperIdx, DefSU->getInstr())); in addVRegDefDeps()
575 SU->Latency = SchedModel.computeInstrLatency(SU->getInstr()); in initSUnits()
585 if (SchedModel.hasInstrSchedModel()) { in initSUnits()
588 make_range(SchedModel.getWriteProcResBegin(SC), in initSUnits()
589 SchedModel.getWriteProcResEnd(SC))) { in initSUnits()
590 switch (SchedModel.getProcResource(PRE.ProcResourceIdx)->BufferSize) { in initSUnits()
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| H A D | EarlyIfConversion.cpp | 759 MCSchedModel SchedModel; member in __anon1f7aa2560311::EarlyIfConverter
880 unsigned CritLimit = SchedModel.MispredictPenalty/2; in shouldConvertIf()
1054 SchedModel = STI.getSchedModel(); in runOnMachineFunction()
1083 TargetSchedModel SchedModel; member in __anon1f7aa2560911::EarlyIfPredicator
1135 unsigned NumCycles = SchedModel.computeInstrLatency(&I, false); in shouldConvertIf()
1149 unsigned NumCycles = SchedModel.computeInstrLatency(&I, false); in shouldConvertIf()
1155 unsigned NumCycles = SchedModel.computeInstrLatency(&I, false); in shouldConvertIf()
1189 SchedModel.init(&STI); in runOnMachineFunction()
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| /llvm-project-15.0.7/llvm/include/llvm/CodeGen/ |
| H A D | TargetSchedule.h | 33 MCSchedModel SchedModel; variable
49 TargetSchedModel() : SchedModel(MCSchedModel::GetDefaultSchedModel()) {} in TargetSchedModel()
74 const MCSchedModel *getMCSchedModel() const { return &SchedModel; } in getMCSchedModel()
95 unsigned getProcessorID() const { return SchedModel.getProcessorID(); } in getProcessorID()
98 unsigned getIssueWidth() const { return SchedModel.IssueWidth; } in getIssueWidth()
113 return SchedModel.getNumProcResourceKinds(); in getNumProcResourceKinds()
118 return SchedModel.getProcResource(PIdx); in getProcResource()
125 return SchedModel.getProcResource(PIdx)->Name; in getResourceName()
160 unsigned getMicroOpBufferSize() const { return SchedModel.MicroOpBufferSize; } in getMicroOpBufferSize()
165 return SchedModel.getProcResource(PIdx)->BufferSize; in getResourceBufferSize()
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| H A D | VLIWMachineScheduler.h | 40 const TargetSchedModel *SchedModel; variable
128 const TargetSchedModel *SchedModel = nullptr; member
157 SchedModel = smodel; in init()
165 CriticalPathLength = DAG->getBBSize() / SchedModel->getIssueWidth(); in init()
208 const TargetSchedModel *SchedModel = nullptr; variable
242 const TargetSchedModel *SchedModel) const;
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| H A D | ScheduleDAGInstrs.h | 125 TargetSchedModel SchedModel; variable
262 const TargetSchedModel *getSchedModel() const { return &SchedModel; } in getSchedModel()
266 if (!SU->SchedClass && SchedModel.hasInstrSchedModel()) in getSchedClass()
267 SU->SchedClass = SchedModel.resolveSchedClass(SU->getInstr()); in getSchedClass()
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| H A D | MachineScheduler.h | 605 void init(ScheduleDAGMI *DAG, const TargetSchedModel *SchedModel);
621 const TargetSchedModel *SchedModel = nullptr; variable
737 return RetiredMOps * SchedModel->getMicroOpFactor(); in getCriticalCount()
745 return std::max(CurrCycle * SchedModel->getLatencyFactor(), in getExecutedCount()
766 return SchedModel->getProcResource(PIdx)->SubUnitsIdxBegin && in isUnbufferedGroup()
767 !SchedModel->getProcResource(PIdx)->BufferSize; in isUnbufferedGroup()
906 const TargetSchedModel *SchedModel);
911 const TargetSchedModel *SchedModel = nullptr; variable
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| H A D | MachineTraceMetrics.h | 93 TargetSchedModel SchedModel; variable
416 unsigned Factor = SchedModel.getLatencyFactor(); in getCycles()
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| /llvm-project-15.0.7/llvm/lib/Target/SystemZ/ |
| H A D | SystemZHazardRecognizer.cpp | 176 PI = SchedModel->getWriteProcResBegin(SC), in dumpSU()
177 PE = SchedModel->getWriteProcResEnd(SC); PI != PE; ++PI) { in dumpSU()
179 *SchedModel->getProcResource(PI->ProcResourceIdx); in dumpSU()
238 dbgs() << SchedModel->getProcResource(i)->Name in dumpProcResourceCounters()
244 << SchedModel->getProcResource(CriticalResourceIdx)->Name in dumpProcResourceCounters()
297 PI = SchedModel->getWriteProcResBegin(SC), in EmitInstruction()
298 PE = SchedModel->getWriteProcResEnd(SC); PI != PE; ++PI) { in EmitInstruction()
401 PI = SchedModel->getWriteProcResBegin(SC), in resourcesCost()
418 const MCSchedClassDesc *SC = SchedModel->resolveSchedClass(MI); in emitInstruction()
420 make_range(SchedModel->getWriteProcResBegin(SC), in emitInstruction()
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| H A D | SystemZHazardRecognizer.h | 48 const TargetSchedModel *SchedModel; variable
112 : TII(tii), SchedModel(SM) { in SystemZHazardRecognizer()
122 if (!SU->SchedClass && SchedModel->hasInstrSchedModel()) in getSchedClass()
123 SU->SchedClass = SchedModel->resolveSchedClass(SU->getInstr()); in getSchedClass()
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| /llvm-project-15.0.7/llvm/lib/Target/AMDGPU/ |
| H A D | SISchedule.td | 188 let SchedModel = SIFullSpeedModel in {
204 } // End SchedModel = SIFullSpeedModel
206 let SchedModel = SIQuarterSpeedModel in {
226 } // End SchedModel = SIQuarterSpeedModel
228 let SchedModel = SIDPFullSpeedModel in {
250 } // End SchedModel = SIDPFullSpeedModel
252 let SchedModel = SIDPGFX940FullSpeedModel in {
286 let SchedModel = GFX10SpeedModel in {
314 } // End SchedModel = GFX10SpeedModel
316 let SchedModel = GFX11SpeedModel in {
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| H A D | AMDGPUInsertDelayAlu.cpp | 33 TargetSchedModel SchedModel; member in __anond01463870111::AMDGPUInsertDelayAlu
382 unsigned Latency = SchedModel.computeOperandLatency( in runOnMachineBasicBlock()
425 SchedModel.init(&ST); in runOnMachineFunction()
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| /llvm-project-15.0.7/llvm/lib/Target/AArch64/ |
| H A D | AArch64StorePairSuppress.cpp | 34 TargetSchedModel SchedModel; member in __anone4333b350111::AArch64StorePairSuppress
87 SchedModel.getMCSchedModel()->getSchedClassDesc(SCIdx); in shouldAddSTPToBlock()
129 SchedModel.init(&ST); in runOnMachineFunction()
135 if (!SchedModel.hasInstrSchedModel()) { in runOnMachineFunction()
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| H A D | AArch64SIMDInstrOpt.cpp | 71 TargetSchedModel SchedModel; member
222 std::string Subtarget = std::string(SchedModel.getSubtargetInfo()->getCPU()); in shouldReplaceInst()
230 SchedModel.getMCSchedModel()->getSchedClassDesc(SCIdx); in shouldReplaceInst()
242 SCDescRepl = SchedModel.getMCSchedModel()->getSchedClassDesc( in shouldReplaceInst()
254 ReplCost += SchedModel.computeInstrLatency(IDesc->getOpcode()); in shouldReplaceInst()
256 if (SchedModel.computeInstrLatency(InstDesc->getOpcode()) > ReplCost) in shouldReplaceInst()
293 std::string(SchedModel.getSubtargetInfo()->getCPU()); in shouldExitEarly()
705 SchedModel.init(&ST); in runOnMachineFunction()
706 if (!SchedModel.hasInstrSchedModel()) in runOnMachineFunction()
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| H A D | AArch64SchedKryo.td | 41 let SchedModel = KryoModel in {
60 let SchedModel = KryoModel in {
141 } // SchedModel = KryoModel
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| /llvm-project-15.0.7/llvm/test/TableGen/ |
| H A D | InvalidMCSchedClassDesc.td | 23 let SchedModel = SchedModel_A in {
32 let SchedModel = SchedModel_B in {
40 let SchedModel = SchedModel_C in {
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| /llvm-project-15.0.7/llvm/include/llvm/Target/ |
| H A D | TargetSchedule.td | 187 SchedMachineModel SchedModel = ?;
202 SchedMachineModel SchedModel = ?;
244 SchedMachineModel SchedModel = ?;
267 SchedMachineModel SchedModel = ?;
323 SchedMachineModel SchedModel = ?;
364 SchedMachineModel SchedModel = ?;
374 SchedMachineModel SchedModel = ?;
401 SchedMachineModel SchedModel = ?;
431 SchedMachineModel SchedModel = ?;
444 SchedMachineModel SchedModel = ?;
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| /llvm-project-15.0.7/llvm/include/llvm/MC/ |
| H A D | MCInstrItineraries.h | 111 MCSchedModel SchedModel =
122 : SchedModel(SM), Stages(S), OperandCycles(OS), Forwardings(F), in InstrItineraryData()
123 Itineraries(SchedModel.InstrItineraries) {} in InstrItineraryData()
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| /llvm-project-15.0.7/llvm/lib/Target/Hexagon/ |
| H A D | HexagonMachineScheduler.cpp | 41 const TargetSubtargetInfo &STI, const TargetSchedModel *SchedModel) const { in createVLIWResourceModel()
42 return new HexagonVLIWResourceModel(STI, SchedModel); in createVLIWResourceModel()
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| H A D | HexagonMachineScheduler.h | 35 const TargetSchedModel *SchedModel) const override;
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| /llvm-project-15.0.7/llvm/lib/MC/ |
| H A D | MCSubtargetInfo.cpp | 323 assert(CPUEntry->SchedModel && "Missing processor SchedModel value"); in getSchedModelForCPU()
324 return *CPUEntry->SchedModel; in getSchedModelForCPU()
329 const MCSchedModel &SchedModel = getSchedModelForCPU(CPU); in getInstrItineraryForCPU() local
330 return InstrItineraryData(SchedModel, Stages, OperandCycles, ForwardingPaths); in getInstrItineraryForCPU()
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| /llvm-project-15.0.7/llvm/tools/llvm-exegesis/lib/ |
| H A D | SchedClassResolution.cpp | 252 const auto &SchedModel = STI.getSchedModel(); in findProcResIdx() local
253 for (int I = 0, E = SchedModel.getNumProcResourceKinds(); I < E; ++I) { in findProcResIdx()
254 if (NameOrId == SchedModel.getProcResource(I)->Name) in findProcResIdx()
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