Searched refs:SYSm (Results 1 – 5 of 5) sorted by relevance
| /llvm-project-15.0.7/llvm/lib/Target/ARM/Utils/ |
| H A D | ARMBaseInfo.cpp | 53 const MClassSysReg *lookupMClassSysRegBy12bitSYSmValue(unsigned SYSm) { in lookupMClassSysRegBy12bitSYSmValue() argument 54 return lookupMClassSysRegByM1Encoding12(SYSm); in lookupMClassSysRegBy12bitSYSmValue() 59 const MClassSysReg *lookupMClassSysRegAPSRNonDeprecated(unsigned SYSm) { in lookupMClassSysRegAPSRNonDeprecated() argument 60 return lookupMClassSysRegByM2M3Encoding8((1<<9)|(SYSm & 0xFF)); in lookupMClassSysRegAPSRNonDeprecated() 64 const MClassSysReg *lookupMClassSysRegBy8bitSYSmValue(unsigned SYSm) { in lookupMClassSysRegBy8bitSYSmValue() argument 65 return ARMSysReg::lookupMClassSysRegByM2M3Encoding8((1<<8)|(SYSm & 0xFF)); in lookupMClassSysRegBy8bitSYSmValue()
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| H A D | ARMBaseInfo.h | 214 const MClassSysReg *lookupMClassSysRegBy12bitSYSmValue(unsigned SYSm); 218 const MClassSysReg *lookupMClassSysRegAPSRNonDeprecated(unsigned SYSm); 221 const MClassSysReg *lookupMClassSysRegBy8bitSYSmValue(unsigned SYSm);
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| /llvm-project-15.0.7/llvm/test/MC/Disassembler/ARM/ |
| H A D | invalid-thumb-MSR-MClass.txt | 8 # invalid SYSm 22 # invalid mask = '11' with SYSm not in {0..3} 32 # invalid SYSm
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| /llvm-project-15.0.7/llvm/lib/Target/ARM/MCTargetDesc/ |
| H A D | ARMInstPrinter.cpp | 869 unsigned SYSm = Op.getImm() & 0xFFF; // 12-bit SYSm in printMSRMaskOperand() local 874 auto TheReg =ARMSysReg::lookupMClassSysRegBy12bitSYSmValue(SYSm); in printMSRMaskOperand() 882 SYSm &= 0xff; in printMSRMaskOperand() 886 auto TheReg = ARMSysReg::lookupMClassSysRegAPSRNonDeprecated(SYSm); in printMSRMaskOperand() 893 auto TheReg = ARMSysReg::lookupMClassSysRegBy8bitSYSmValue(SYSm); in printMSRMaskOperand() 899 O << SYSm; in printMSRMaskOperand()
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| /llvm-project-15.0.7/llvm/lib/Target/ARM/ |
| H A D | ARMInstrThumb2.td | 4442 def t2MRS_M : T2I<(outs rGPR:$Rd), (ins msr_mask:$SYSm), NoItinerary, 4443 "mrs", "\t$Rd, $SYSm", []>, 4446 bits<8> SYSm; 4449 let Inst{7-0} = SYSm; 4501 def t2MSR_M : T2I<(outs), (ins msr_mask:$SYSm, rGPR:$Rn), 4502 NoItinerary, "msr", "\t$SYSm, $Rn", []>, 4504 bits<12> SYSm; 4510 let Inst{11-10} = SYSm{11-10}; 4512 let Inst{7-0} = SYSm{7-0};
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