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Searched refs:SVEDataVector (Results 1 – 2 of 2) sorted by relevance

/llvm-project-15.0.7/llvm/lib/Target/AArch64/AsmParser/
H A DAArch64AsmParser.cpp70 SVEDataVector, enumerator
1168 RK = RegKind::SVEDataVector; in isSVEVectorReg()
1200 if (Kind != k_Register || Reg.Kind != RegKind::SVEDataVector) in isSVEDataVectorRegOfWidth()
2004 assert((Kind == RegKind::NeonVector || Kind == RegKind::SVEDataVector || in CreateVectorReg()
2408 case RegKind::SVEDataVector: in parseVectorKind()
2629 return Kind == RegKind::SVEDataVector ? RegNum : 0; in matchRegisterNameAlias()
6459 RegisterKind = RegKind::SVEDataVector; in parseDirectiveReq()
6461 tryParseVectorRegister(RegNum, Kind, RegKind::SVEDataVector); in parseDirectiveReq()
6987 tryParseVectorRegister(RegNum, Kind, RegKind::SVEDataVector); in tryParseSVEDataVector()
6995 const auto &KindRes = parseVectorKind(Kind, RegKind::SVEDataVector); in tryParseSVEDataVector()
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/llvm-project-15.0.7/llvm/lib/Target/AArch64/
H A DAArch64RegisterInfo.td1007 let ParserMethod = "tryParseVectorList<RegKind::SVEDataVector>";
1009 "isTypedVectorList<RegKind::SVEDataVector, " #NumRegs #", 0, " #ElementWidth #">";