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/llvm-project-15.0.7/llvm/test/CodeGen/AArch64/
H A Dzero-call-used-regs.ll159 ; SVE-LABEL: all_arg:
162 ; SVE-NEXT: mov x1, #0
163 ; SVE-NEXT: mov x3, #0
164 ; SVE-NEXT: mov x4, #0
184 ; SVE-NEXT: ret
241 ; SVE-LABEL: all:
303 ; SVE-NEXT: ret
363 ; SVE-NEXT: ret
384 ; SVE-NEXT: ret
496 ; SVE-NEXT: ret
[all …]
H A DREADME1 ++ SVE CodeGen Warnings ++
3 When the WARN check lines fail in the SVE codegen tests it most likely means you
H A Dllvm-masked-scatter-legal-for-sve.ll4 ; packed in SVE registers are not scalarized.
14 ; data that is packed in SVE registers are not scalarized.
24 ; data that is unpacked in SVE registers are not scalarized.
46 ; instructions and because we are not targeting fixed width SVE.
H A Dllvm-masked-gather-legal-for-sve.ll4 ; packed in SVE registers are not scalarized.
14 ; that is packed in SVE registers are not scalarized.
24 ; that is unpacked in SVE registers are not scalarized.
46 ; instructions and because we are not targeting fixed width SVE.
H A Dsve-coalesce-ptrue-intrinsics.ll18 ; Two calls to the SVE ptrue intrinsic. %1 is redundant, and can be expressed as an SVE reinterpret…
36 ; Two calls to the SVE ptrue intrinsic with the SV_POW2 pattern. This should reduce to the same out…
54 ; Four calls to the SVE ptrue intrinsic; two with the SV_ALL patterns, and two with the SV_POW2 pat…
83 ; Two calls to the SVE ptrue intrinsic: one with the SV_ALL pattern, another with the SV_POW2 patte…
100 ; Two calls to the SVE ptrue intrinsic with the SV_VL1 pattern. This pattern is not currently recog…
117 ; Four calls to the SVE ptrue intrinsic. %7 is the most encompassing, and the others can be express…
118 ; SVE reinterprets of %7 via convert.{to,from}.svbool.
143 ; Two calls to the SVE ptrue intrinsic which are both of the same size. In this case, one should be…
144 ; as redundant and rewritten and an SVE reinterpret of the other via the convert.{to,from}.svbool i…
160 ; Two calls to the SVE ptrue intrinsic, but neither can be eliminated; %1 is promoted to become %3,…
[all …]
H A Dsve-fixed-length-extract-vector-elt.ll12 ; Don't use SVE for 64-bit vectors.
23 ; Don't use SVE for 128-bit vectors.
96 ; Don't use SVE for 64-bit vectors.
107 ; Don't use SVE for 128-bit vectors.
180 ; Don't use SVE for 64-bit vectors.
189 ; Don't use SVE for 128-bit vectors.
H A Dsve-tailcall.ll4 ; Check that a tail call from an SVE function to another SVE function
47 ; Check that a tail call from an SVE function to a non-SVE function
48 ; does not use a tail-call, because after the call many of the SVE
122 ; Check that a tail call from an SVE function to a non-SVE function
123 ; does not use a tail-call, because after the call many of the SVE
H A Dsve-fixed-length-int-to-fp.ll12 ; Don't use SVE for 64-bit vectors.
22 ; Don't use SVE for 128-bit vectors.
108 ; Don't use SVE for 64-bit vectors.
120 ; Don't use SVE for 128-bit vectors.
207 ; v1i16 is perfered to be widened to v4i16, which pushes the output into SVE types, so use SVE
222 ; Don't use SVE for 128-bit vectors.
315 ; Don't use SVE for 64-bit vectors.
425 ; Don't use SVE for 64-bit vectors.
517 ; Don't use SVE for 64-bit vectors.
616 ; Don't use SVE for 64-bit vectors.
[all …]
H A Dsve-fixed-length-fp-rounding.ll12 ; Don't use SVE for 64-bit vectors.
22 ; Don't use SVE for 128-bit vectors.
100 ; Don't use SVE for 64-bit vectors.
110 ; Don't use SVE for 128-bit vectors.
188 ; Don't use SVE for 64-bit vectors.
198 ; Don't use SVE for 128-bit vectors.
280 ; Don't use SVE for 64-bit vectors.
290 ; Don't use SVE for 128-bit vectors.
368 ; Don't use SVE for 64-bit vectors.
456 ; Don't use SVE for 64-bit vectors.
[all …]
H A Dsve-fixed-length-splat-vector.ll12 ; Don't use SVE for 64-bit vectors.
23 ; Don't use SVE for 128-bit vectors.
95 ; Don't use SVE for 64-bit vectors.
106 ; Don't use SVE for 128-bit vectors.
178 ; Don't use SVE for 64-bit vectors.
189 ; Don't use SVE for 128-bit vectors.
261 ; Don't use SVE for 64-bit vectors.
272 ; Don't use SVE for 128-bit vectors.
348 ; Don't use SVE for 64-bit vectors.
438 ; Don't use SVE for 64-bit vectors.
[all …]
H A Dsve-fixed-length-fp-extend-trunc.ll12 ; Don't use SVE for 64-bit vectors.
26 ; Don't use SVE for 128-bit vectors.
112 ; Don't use SVE for 64-bit vectors.
126 ; v2f16 is not legal for NEON, so use SVE
215 ; Don't use SVE for 64-bit vectors.
229 ; Don't use SVE for 128-bit vectors.
315 ; Don't use SVE for 64-bit vectors.
329 ; Don't use SVE for 128-bit vectors.
415 ; Don't use SVE for 64-bit vectors.
523 ; Don't use SVE for 64-bit vectors.
[all …]
H A Dsve-fixed-length-bitcast.ll8 ; Don't use SVE for 64-bit vectors.
21 ; Don't use SVE for 128-bit vectors.
96 ; Don't use SVE for 64-bit vectors.
109 ; Don't use SVE for 128-bit vectors.
184 ; Don't use SVE for 64-bit vectors.
197 ; Don't use SVE for 128-bit vectors.
H A Dsve-fixed-length-fp-arith.ll12 ; Don't use SVE for 64-bit vectors.
22 ; Don't use SVE for 128-bit vectors.
110 ; Don't use SVE for 64-bit vectors.
120 ; Don't use SVE for 128-bit vectors.
208 ; Don't use SVE for 64-bit vectors.
218 ; Don't use SVE for 128-bit vectors.
310 ; Don't use SVE for 64-bit vectors.
320 ; Don't use SVE for 128-bit vectors.
408 ; Don't use SVE for 64-bit vectors.
506 ; Don't use SVE for 64-bit vectors.
[all …]
H A Dsve-fixed-length-fp-to-int.ll12 ; Don't use SVE for 64-bit vectors.
22 ; Don't use SVE for 128-bit vectors.
108 ; Don't use SVE for 64-bit vectors.
120 ; Don't use SVE for 128-bit vectors.
213 ; Don't use SVE for 64-bit vectors.
325 ; Don't use SVE for 64-bit vectors.
335 ; Don't use SVE for 128-bit vectors.
434 ; Don't use SVE for 64-bit vectors.
526 ; Don't use SVE for 64-bit vectors.
741 ; Don't use SVE for 64-bit vectors.
[all …]
H A Dsve-fixed-length-int-log.ll12 ; Don't use SVE for 64-bit vectors.
22 ; Don't use SVE for 128-bit vectors.
110 ; Don't use SVE for 64-bit vectors.
120 ; Don't use SVE for 128-bit vectors.
208 ; Don't use SVE for 64-bit vectors.
218 ; Don't use SVE for 128-bit vectors.
306 ; Don't use SVE for 64-bit vectors.
316 ; Don't use SVE for 128-bit vectors.
408 ; Don't use SVE for 64-bit vectors.
506 ; Don't use SVE for 64-bit vectors.
[all …]
/llvm-project-15.0.7/llvm/test/Transforms/LoopVectorize/AArch64/
H A Dgather-do-not-vectorize-addressing.ll42 ; SVE-LABEL: @test(
43 ; SVE-NEXT: entry:
46 ; SVE: for.body.preheader:
48 ; SVE-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64()
49 ; SVE-NEXT: [[TMP1:%.*]] = mul i64 [[TMP0]], 2
52 ; SVE: vector.ph:
54 ; SVE-NEXT: [[TMP3:%.*]] = mul i64 [[TMP2]], 2
57 ; SVE-NEXT: br label [[VECTOR_BODY:%.*]]
58 ; SVE: vector.body:
61 ; SVE-NEXT: [[TMP4:%.*]] = add i64 [[INDEX]], 0
[all …]
H A Dscalarize-store-with-predication.ll9 ; configuration where masked loads/stores are legal -- e.g. AArch64 with SVE.
15 ; This is _not_ an SVE-specific test. The same bug could manifest on any
16 ; architecture with masked loads/stores, but we use SVE for testing purposes
H A Dscalable-vf-hint.ll4 …s=loop-vectorize -debug-only=loop-vectorize -S < %s 2>%t | FileCheck --check-prefix=CHECK-NO-SVE %s
5 ; RUN: cat %t | FileCheck %s -check-prefix=CHECK-NO-SVE-REMARKS
37 ; unless max(vscale)=2 it's unsafe to vectorize. For SVE max(vscale)=16, check
318 ; CHECK-NO-SVE-REMARKS-LABEL: LV: Checking a loop in 'test_no_sve'
319 ; CHECK-NO-SVE-REMARKS: LV: User VF=vscale x 4 is ignored because scalable vectors are not availabl…
320 ; CHECK-NO-SVE-REMARKS: remark: <unknown>:0:0: User-specified vectorization factor vscale x 4 is ig…
321 ; CHECK-NO-SVE-REMARKS: LV: Selecting VF: 4.
322 ; CHECK-NO-SVE-LABEL: @test_no_sve
323 ; CHECK-NO-SVE: <4 x i32>
324 ; CHECK-NO-SVE-NOT: <vscale x 4 x i32>
H A Dsve-tail-folding-cost.ll8 ; NEON it needs to scalarize the load, whereas for SVE it can use a predicated load.
14 ; break in future if we permit the use of SVE loads and stores to perform the
/llvm-project-15.0.7/llvm/test/Analysis/CostModel/AArch64/
H A Dmem-op-cost-model.ll1 ; Check memory cost model action for fixed vector SVE and Neon
3 ; CHECK-NEON has same performance as CHECK-SVE-128
13 ; CHECK-SVE-128: Cost Model: Found an estimated cost of 1 for instruction:
14 ; CHECK-SVE-256: Cost Model: Found an estimated cost of 1 for instruction:
15 ; CHECK-SVE-512: Cost Model: Found an estimated cost of 1 for instruction:
23 ; CHECK-SVE-128: Cost Model: Found an estimated cost of 1 for instruction:
24 ; CHECK-SVE-256: Cost Model: Found an estimated cost of 1 for instruction:
25 ; CHECK-SVE-512: Cost Model: Found an estimated cost of 1 for instruction:
33 ; CHECK-SVE-128: Cost Model: Found an estimated cost of 1 for instruction:
34 ; CHECK-SVE-256: Cost Model: Found an estimated cost of 1 for instruction:
[all …]
/llvm-project-15.0.7/llvm/test/Transforms/LoopVectorize/
H A Dvector-freeze.ll2 …rs=true -force-vector-width=16 -force-vector-interleave=1 -S < %s | FileCheck %s --check-prefix=SVE
9 ; SVE-LABEL: @test(
10 ; SVE: vector.body:
11 ; SVE: freeze <vscale x 16 x i64>
/llvm-project-15.0.7/lldb/scripts/lldb-test-qemu/
H A Drun-qemu.sh51 --sve) SVE=1;;
101 if [[ $SVE ]]; then
112 if [[ $SVE ]]; then
/llvm-project-15.0.7/clang/include/clang/Basic/
H A DBuiltinsSVE.def1 //===--- BuiltinsSVE.def - SVE Builtin function database --------*- C++ -*-===//
9 // This file defines the SVE-specific builtin function database. Users of
H A DAArch64SVEACLETypes.def1 //===-- AArch64SVEACLETypes.def - Metadata about SVE types ------*- C++ -*-===//
9 // This file defines various SVE builtin types. The macros are:
16 // An SVE scalable vector.
18 // SVE_PREDICATE_TYPE(Name, Id, SingletonId, ElKind) - An SVE scalable
/llvm-project-15.0.7/clang/test/CodeGen/aarch64-sve-intrinsics/
H A DREADME1 ++ SVE ACLE Warnings ++
3 When the ASM check lines fail in the SVE ACLE tests it most likely means you

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