| /llvm-project-15.0.7/clang/lib/StaticAnalyzer/Core/ |
| H A D | LoopWidening.cpp | 57 const StackFrameContext *STC = LCtx->getStackFrame(); in getWidenedLoopState() local 59 const MemRegion *Regions[] = {MRMgr.getStackLocalsRegion(STC), in getWidenedLoopState() 60 MRMgr.getStackArgumentsRegion(STC), in getWidenedLoopState() 86 const CXXMethodDecl *CXXMD = dyn_cast<CXXMethodDecl>(STC->getDecl()); in getWidenedLoopState() 89 MRMgr.getCXXThisRegion(CXXMD->getThisType(), STC); in getWidenedLoopState()
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| H A D | MemRegion.cpp | 848 assert(STC); in getStackLocalsRegion() 855 new (R) StackLocalsSpaceRegion(*this, STC); in getStackLocalsRegion() 861 assert(STC); in getStackArgumentsRegion() 1003 if (!STC) { in getVarRegion() 1016 const Decl *STCD = STC->getDecl(); in getVarRegion() 1083 assert(STC); in getBlockDataRegion() 1084 sReg = getStackLocalsRegion(STC); in getBlockDataRegion() 1111 assert(STC); in getCompoundLiteralRegion() 1112 sReg = getStackLocalsRegion(STC); in getCompoundLiteralRegion() 1249 assert(STC); in getCXXThisRegion() [all …]
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| /llvm-project-15.0.7/llvm/test/CodeGen/SystemZ/ |
| H A D | postra-sched-expandedops.mir | 82 STC killed renamable $r0l, undef renamable $r1d, 0, $noreg :: (store (s8) into `i8* undef`) 84 STC renamable $r4l, $noreg, 0, $noreg, implicit killed $r4d :: (store (s8) into `i8* null`) 87 …STC killed renamable $r0l, killed renamable $r3d, 2, killed renamable $r1d :: (store (s8) into %ir…
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| H A D | int-move-04.ll | 34 ; Check the high end of the STC range. 44 ; Check the next byte up, which should use STCY instead of STC. 108 ; Check that STC allows an index.
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| H A D | regalloc-fast-invalid-kill-flag.mir | 28 STC %1.subreg_l32, %2, 8, $noreg
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| H A D | frame-16.ll | 104 ; Add 4095 to the previous offset, to test the other end of the STC range. 125 ; Test the next offset after that, which uses STCY instead of STC. 148 ; LLILH while still using STC in more cases than 0x40000 anchors would. 191 ; kind of anchor optimization, so there should be no offset on the STC itself.
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| H A D | int-const-03.ll | 142 ; Check that MVI does not allow an index. We prefer STC in that case.
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| H A D | cond-store-01.ll | 178 ; Check the high end of the STC range. 194 ; Check the next byte up, which should use STCY instead of STC.
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| /llvm-project-15.0.7/llvm/include/llvm/Target/ |
| H A D | TargetMachine.h | 164 template <typename STC> const STC &getSubtarget(const Function &F) const { in getSubtarget() 165 return *static_cast<const STC*>(getSubtargetImpl(F)); in getSubtarget()
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| /llvm-project-15.0.7/llvm/include/llvm/CodeGen/ |
| H A D | MachineFunction.h | 661 template<typename STC> const STC &getSubtarget() const { 662 return *static_cast<const STC *>(STI);
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| H A D | SelectionDAG.h | 455 template <typename STC> const STC &getSubtarget() const { 456 return MF->getSubtarget<STC>();
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| /llvm-project-15.0.7/llvm/test/tools/llvm-mca/X86/BtVer2/ |
| H A D | pipes-fpu.s | 8 # VIMUL/STC
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| /llvm-project-15.0.7/llvm/test/tools/llvm-mca/X86/BdVer2/ |
| H A D | pipes-fpu.s | 8 # VIMUL/STC
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| /llvm-project-15.0.7/clang/include/clang/StaticAnalyzer/Core/PathSensitive/ |
| H A D | MemRegion.h | 1379 getStackLocalsRegion(const StackFrameContext *STC); 1384 getStackArgumentsRegion(const StackFrameContext *STC);
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| /llvm-project-15.0.7/llvm/lib/Target/SystemZ/ |
| H A D | SystemZScheduleZ196.td | 241 def : InstRW<[WLat1, FXU, LSU, NormalGr], (instregex "STC(H|Y|Mux)?$")>; 1235 def : InstRW<[WLat30, MCD], (instregex "STC(PS|RW)$")>;
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| H A D | SystemZScheduleZEC12.td | 252 def : InstRW<[WLat1, FXU, LSU, NormalGr], (instregex "STC(H|Y|Mux)?$")>; 1280 def : InstRW<[WLat30, MCD], (instregex "STC(PS|RW)$")>;
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| H A D | SystemZInstrInfo.td | 795 // STC, STCY or STCH, depending on the choice of register. 798 defm STC : StoreRXPair<"stc", 0x42, 0xE372, truncstorei8, GR32, 1>; 812 defm : StoreGR64Pair<STC, STCY, truncstorei8>;
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| H A D | SystemZScheduleZ13.td | 278 def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "STC(H|Y|Mux)?$")>; 1554 def : InstRW<[WLat30, MCD], (instregex "STC(PS|RW)$")>;
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| H A D | SystemZScheduleZ16.td | 283 def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "STC(H|Y|Mux)?$")>; 1723 def : InstRW<[WLat30, MCD], (instregex "STC(PS|RW)$")>;
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| H A D | SystemZScheduleZ15.td | 283 def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "STC(H|Y|Mux)?$")>; 1690 def : InstRW<[WLat30, MCD], (instregex "STC(PS|RW)$")>;
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| H A D | SystemZScheduleZ14.td | 279 def : InstRW<[WLat1, FXb, LSU, NormalGr], (instregex "STC(H|Y|Mux)?$")>; 1644 def : InstRW<[WLat30, MCD], (instregex "STC(PS|RW)$")>;
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| H A D | SystemZInstrInfo.cpp | 1398 expandRXYPseudo(MI, SystemZ::STC, SystemZ::STCH); in expandPostRAPseudo()
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| /llvm-project-15.0.7/llvm/lib/Target/X86/ |
| H A D | X86ScheduleBtVer2.td | 38 def JFPU1 : ProcResource<1>; // Vector/FPU Pipe1: VALU1/STC/FPM
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| H A D | X86ScheduleBdVer2.td | 1018 // FIXME: f+3 ST, LD+STC latency
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| /llvm-project-15.0.7/llvm/lib/Target/ARM/ |
| H A D | ARMScheduleA57.td | 128 def : InstRW<[WriteNoop, WriteNoop], (instregex "(t2)?LDA", "(t2)?LDC", "(t2)?STC",
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