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Searched refs:SSE3 (Results 1 – 25 of 43) sorted by relevance

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/llvm-project-15.0.7/llvm/test/CodeGen/X86/
H A Dhaddsub.ll12 ; SSE3-LABEL: haddpd1:
13 ; SSE3: # %bb.0:
15 ; SSE3-NEXT: retq
28 ; SSE3-LABEL: haddpd2:
29 ; SSE3: # %bb.0:
31 ; SSE3-NEXT: retq
76 ; SSE3-NEXT: retq
92 ; SSE3-NEXT: retq
108 ; SSE3-NEXT: retq
124 ; SSE3-NEXT: retq
[all …]
H A Dphaddsub-extract.ll20 ; SSE3-SLOW-NEXT: retq
26 ; SSE3-FAST-NEXT: retq
368 ; SSE3-NEXT: retq
390 ; SSE3-NEXT: retq
483 ; SSE3-NEXT: retq
505 ; SSE3-NEXT: retq
1220 ; SSE3-NEXT: retq
1282 ; SSE3-NEXT: retq
1488 ; SSE3-NEXT: retq
1548 ; SSE3-NEXT: retq
[all …]
H A Dvar-permute-128.ll16 ; SSE3: # %bb.0:
26 ; SSE3-NEXT: retq
68 ; SSE3: # %bb.0:
88 ; SSE3-NEXT: retq
131 ; SSE3: # %bb.0:
172 ; SSE3-NEXT: retq
310 ; SSE3-NEXT: retq
388 ; SSE3-NEXT: retq
449 ; SSE3-NEXT: retq
574 ; SSE3-NEXT: retq
[all …]
H A Dhaddsub-2.ll125 ; SSE3: # %bb.0:
151 ; SSE3-NEXT: retq
183 ; SSE3: # %bb.0:
209 ; SSE3-NEXT: retq
241 ; SSE3: # %bb.0:
267 ; SSE3-NEXT: retq
325 ; SSE3-NEXT: retq
570 ; SSE3-NEXT: retq
725 ; SSE3-NEXT: retq
1184 ; SSE3-NEXT: retq
[all …]
H A Dvector-lzcnt-128.ll57 ; SSE3-LABEL: testv2i64:
58 ; SSE3: # %bb.0:
95 ; SSE3-NEXT: retq
308 ; SSE3: # %bb.0:
345 ; SSE3-NEXT: retq
599 ; SSE3-NEXT: retq
825 ; SSE3-NEXT: retq
1039 ; SSE3-NEXT: retq
1229 ; SSE3-NEXT: retq
1413 ; SSE3-NEXT: retq
[all …]
H A Dpromote-vec3.ll9 ; SSE3-LABEL: zext_i8:
10 ; SSE3: # %bb.0:
17 ; SSE3-NEXT: retl
59 ; SSE3-LABEL: sext_i8:
60 ; SSE3: # %bb.0:
62 ; SSE3-NEXT: shll $8, %eax
64 ; SSE3-NEXT: shll $8, %ecx
65 ; SSE3-NEXT: movd %ecx, %xmm0
68 ; SSE3-NEXT: shll $8, %eax
70 ; SSE3-NEXT: psraw $8, %xmm0
[all …]
H A Dvector-popcnt-128-ult-ugt.ll149 ; SSE3: # %bb.0:
165 ; SSE3-NEXT: retq
289 ; SSE3: # %bb.0:
306 ; SSE3-NEXT: retq
448 ; SSE3-NEXT: retq
589 ; SSE3-NEXT: retq
731 ; SSE3-NEXT: retq
872 ; SSE3-NEXT: retq
1014 ; SSE3-NEXT: retq
1155 ; SSE3-NEXT: retq
[all …]
H A Dinsertelement-zero.ll19 ; SSE3: # %bb.0:
22 ; SSE3-NEXT: retq
54 ; SSE3: # %bb.0:
58 ; SSE3-NEXT: retq
95 ; SSE3-NEXT: retq
129 ; SSE3-NEXT: retq
165 ; SSE3-NEXT: retq
204 ; SSE3-NEXT: retq
244 ; SSE3-NEXT: retq
285 ; SSE3-NEXT: retq
[all …]
H A Dhaddsub-shuf.ll460 ; SSE3-NEXT: retq
487 ; SSE3-NEXT: retq
543 ; SSE3-NEXT: retq
576 ; SSE3-NEXT: retq
603 ; SSE3-NEXT: retq
659 ; SSE3-NEXT: retq
697 ; SSE3-NEXT: retq
731 ; SSE3-NEXT: retq
803 ; SSE3-NEXT: retq
837 ; SSE3-NEXT: retq
[all …]
H A Dscalar-fp-to-i64.ll109 ; X86-SSE3-WIN: # %bb.0:
118 ; X86-SSE3-WIN-NEXT: # %bb.1:
120 ; X86-SSE3-WIN-NEXT: LBB0_2:
132 ; X86-SSE3-WIN-NEXT: retl
135 ; X86-SSE3-LIN: # %bb.0:
141 ; X86-SSE3-LIN-NEXT: # %bb.1:
154 ; X86-SSE3-LIN-NEXT: retl
376 ; X86-SSE3-WIN-NEXT: retl
388 ; X86-SSE3-LIN-NEXT: retl
565 ; X86-SSE3-WIN-NEXT: retl
[all …]
H A Dinsertelement-ones.ll18 ; SSE3: # %bb.0:
20 ; SSE3-NEXT: retq
61 ; SSE3: # %bb.0:
63 ; SSE3-NEXT: retq
108 ; SSE3: # %bb.0:
113 ; SSE3-NEXT: retq
169 ; SSE3-NEXT: retq
224 ; SSE3-NEXT: retq
264 ; SSE3-NEXT: retq
323 ; SSE3-NEXT: retq
[all …]
H A Dpr34080.ll88 ; SSE3-LABEL: _Z1fe:
90 ; SSE3-NEXT: pushq %rbp
93 ; SSE3-NEXT: movq %rsp, %rbp
95 ; SSE3-NEXT: fldt 16(%rbp)
96 ; SSE3-NEXT: fld %st(0)
101 ; SSE3-NEXT: fsubl -24(%rbp)
104 ; SSE3-NEXT: fld %st(1)
110 ; SSE3-NEXT: fxch %st(1)
111 ; SSE3-NEXT: fsubl -16(%rbp)
114 ; SSE3-NEXT: popq %rbp
[all …]
H A Dvector-shuffle-128-v4.ll258 ; SSE3-NEXT: retq
286 ; SSE3-NEXT: retq
345 ; SSE3-NEXT: retq
390 ; SSE3-NEXT: retq
440 ; SSE3-NEXT: retq
491 ; SSE3-NEXT: retq
544 ; SSE3-NEXT: retq
606 ; SSE3-NEXT: retq
657 ; SSE3-NEXT: retq
694 ; SSE3-NEXT: retq
[all …]
H A Dvector-shuffle-128-v2.ll116 ; SSE3: # %bb.0:
118 ; SSE3-NEXT: retq
174 ; SSE3-NEXT: retq
231 ; SSE3-NEXT: retq
259 ; SSE3-NEXT: retq
287 ; SSE3-NEXT: retq
357 ; SSE3-NEXT: retq
387 ; SSE3-NEXT: retq
417 ; SSE3-NEXT: retq
449 ; SSE3-NEXT: retq
[all …]
H A Dvector-tzcnt-128.ll42 ; SSE3-LABEL: testv2i64:
43 ; SSE3: # %bb.0:
63 ; SSE3-NEXT: retq
244 ; SSE3: # %bb.0:
264 ; SSE3-NEXT: retq
475 ; SSE3-NEXT: retq
716 ; SSE3-NEXT: retq
951 ; SSE3-NEXT: retq
1127 ; SSE3-NEXT: retq
1295 ; SSE3-NEXT: retq
[all …]
H A Dscalar-fp-to-i32.ll168 ; X86-SSE3-WIN-NEXT: retl
180 ; X86-SSE3-LIN-NEXT: retl
294 ; X86-SSE3-LABEL: d_to_s32:
295 ; X86-SSE3: # %bb.0:
297 ; X86-SSE3-NEXT: retl
392 ; X86-SSE3-WIN-NEXT: retl
401 ; X86-SSE3-LIN-NEXT: retl
410 ; X64-SSE3-WIN-NEXT: retq
417 ; X64-SSE3-LIN-NEXT: retq
602 ; X86-SSE3-WIN-NEXT: retl
[all …]
H A Dvector-popcnt-128.ll35 ; SSE3-LABEL: testv2i64:
36 ; SSE3: # %bb.0:
53 ; SSE3-NEXT: retq
172 ; SSE3: # %bb.0:
194 ; SSE3-NEXT: retq
336 ; SSE3: # %bb.0:
355 ; SSE3-NEXT: retq
474 ; SSE3: # %bb.0:
489 ; SSE3-NEXT: retq
694 ; SSE3-NEXT: retq
[all …]
/llvm-project-15.0.7/llvm/test/Analysis/CostModel/X86/
H A Dfcmp.ll30 ; SSE3-LABEL: 'cmp_float_oeq'
137 ; SSE3-LABEL: 'cmp_float_one'
244 ; SSE3-LABEL: 'cmp_float_ord'
351 ; SSE3-LABEL: 'cmp_float_oge'
458 ; SSE3-LABEL: 'cmp_float_ogt'
565 ; SSE3-LABEL: 'cmp_float_ole'
672 ; SSE3-LABEL: 'cmp_float_olt'
779 ; SSE3-LABEL: 'cmp_float_ueq'
886 ; SSE3-LABEL: 'cmp_float_une'
993 ; SSE3-LABEL: 'cmp_float_uno'
[all …]
H A Dshuffle-load.ll153 ; SSE3-LABEL: 'shuffle_load'
154 ; SSE3-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %ld_2xi8 = load <2 x i8>, p…
156 ; SSE3-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %ld_4xi8 = load <4 x i8>, p…
158 ; SSE3-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %ld_8xi8 = load <8 x i8>, p…
160 ; SSE3-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %ld_16xi8 = load <16 x i8>,…
162 ; SSE3-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %ld_32xi8 = load <32 x i8>,…
164 ; SSE3-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %ld_64xi8 = load <64 x i8>,…
166 ; SSE3-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %ld_2xi16 = load <2 x i16>,…
168 ; SSE3-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %ld_4xi16 = load <4 x i16>,…
176 ; SSE3-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %ld_2xi32 = load <2 x i32>,…
[all …]
H A Dvector-extract.ll172 ; SSE3-LABEL: 'extract_i64'
174 ; SSE3-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v2i64_0 = extractelement <…
175 ; SSE3-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %v2i64_1 = extractelement <…
177 ; SSE3-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %v4i64_0 = extractelement <…
184 ; SSE3-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
307 ; SSE3-LABEL: 'extract_i32'
324 ; SSE3-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
489 ; SSE3-LABEL: 'extract_i16'
512 ; SSE3-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
728 ; SSE3-LABEL: 'extract_i8'
[all …]
H A Dvector-insert.ll96 ; SSE3-LABEL: 'insert_float'
113 ; SSE3-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
267 ; SSE3-LABEL: 'insert_i64'
279 ; SSE3-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
402 ; SSE3-LABEL: 'insert_i32'
419 ; SSE3-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
698 ; SSE3-LABEL: 'insert_i8'
700 ; SSE3-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v2i8_0 = insertelement <2 …
729 ; SSE3-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
1002 ; SSE3-LABEL: 'insert_i1'
[all …]
H A Dvector-insert-inseltpoison.ll96 ; SSE3-LABEL: 'insert_float'
113 ; SSE3-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
267 ; SSE3-LABEL: 'insert_i64'
279 ; SSE3-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
402 ; SSE3-LABEL: 'insert_i32'
419 ; SSE3-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
698 ; SSE3-LABEL: 'insert_i8'
700 ; SSE3-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %v2i8_0 = insertelement <2 …
729 ; SSE3-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
1002 ; SSE3-LABEL: 'insert_i1'
[all …]
H A Dicmp.ll42 ; SSE3-LABEL: 'cmp_int_eq'
63 ; SSE3-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
346 ; SSE3-LABEL: 'cmp_int_ne'
650 ; SSE3-LABEL: 'cmp_int_sge'
954 ; SSE3-LABEL: 'cmp_int_uge'
1258 ; SSE3-LABEL: 'cmp_int_sgt'
1562 ; SSE3-LABEL: 'cmp_int_ugt'
1866 ; SSE3-LABEL: 'cmp_int_sle'
2170 ; SSE3-LABEL: 'cmp_int_ule'
2474 ; SSE3-LABEL: 'cmp_int_slt'
[all …]
H A Dshuffle-replication-i64.ll20 ; SSE3-LABEL: 'replication_i64_stride2'
25 ; SSE3-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void
84 ; SSE3-LABEL: 'replication_i64_stride3'
89 ; SSE3-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void
148 ; SSE3-LABEL: 'replication_i64_stride4'
153 ; SSE3-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void
212 ; SSE3-LABEL: 'replication_i64_stride5'
217 ; SSE3-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void
276 ; SSE3-LABEL: 'replication_i64_stride6'
340 ; SSE3-LABEL: 'replication_i64_stride7'
[all …]
/llvm-project-15.0.7/llvm/lib/Target/X86/
H A DX86Subtarget.h54 NoSSE, SSE1, SSE2, SSE3, SSSE3, SSE41, SSE42, AVX, AVX2, AVX512 enumerator
201 bool hasSSE3() const { return X86SSELevel >= SSE3; } in hasSSE3()

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