Searched refs:SMPos0 (Results 1 – 1 of 1) sorted by relevance
| /llvm-project-15.0.7/llvm/lib/Target/Mips/ |
| H A D | MipsISelLowering.cpp | 858 unsigned SMPos0, SMSize0, SMPos1, SMSize1; in performORCombine() local
866 !isShiftedMask_64(~CN->getSExtValue(), SMPos0, SMSize0)) in performORCombine()
878 if (SMPos0 != SMPos1 || SMSize0 != SMSize1) in performORCombine()
891 if ((Shamt != SMPos0) || (SMPos0 + SMSize0 > ValTy.getSizeInBits())) in performORCombine()
896 DAG.getConstant(SMPos0, DL, MVT::i32), in performORCombine()
904 if (~CN->getSExtValue() == ((((int64_t)1 << SMSize0) - 1) << SMPos0) && in performORCombine()
905 ((SMSize0 + SMPos0 <= 64 && Subtarget.hasMips64r2()) || in performORCombine()
906 (SMSize0 + SMPos0 <= 32))) { in performORCombine()
926 Const1 = DAG.getConstant(SMPos0, DL, MVT::i32); in performORCombine()
932 ? DAG.getConstant(CN1->getSExtValue() >> SMPos0, DL, ValTy) in performORCombine()
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