Searched refs:SMLALD (Results 1 – 13 of 13) sorted by relevance
| /llvm-project-15.0.7/llvm/test/CodeGen/ARM/ParallelDSP/ |
| H A D | sext-acc.ll | 42 ; CHECK: [[SMLALD:%[^ ]+]] = call i64 @llvm.arm.smlald(i32 [[A]], i32 [[B]], i64 [[ACC]]) 43 ; CHECK: call i64 @llvm.arm.smlald(i32 [[A_2]], i32 [[B_2]], i64 [[SMLALD]]) 94 ; CHECK: [[SMLALD:%[^ ]+]] = call i64 @llvm.arm.smlald(i32 [[A]], i32 [[B]], i64 [[ACC]]) 95 ; CHECK: call i64 @llvm.arm.smlald(i32 [[A_2]], i32 [[B_2]], i64 [[SMLALD]]) 146 ; CHECK: [[SMLALD:%[^ ]+]] = call i64 @llvm.arm.smlald(i32 [[A]], i32 [[B]], i64 [[ACC]]) 147 ; CHECK: call i64 @llvm.arm.smlald(i32 [[A_2]], i32 [[B_2]], i64 [[SMLALD]])
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| /llvm-project-15.0.7/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.h | 272 SMLALD, // Signed multiply accumulate long dual enumerator
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| H A D | ARMScheduleR52.td | 280 "SMLALTB", "SMLALTT", "SMLALD", "SMLALDX", "SMLSLD", "SMLSLDX",
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| H A D | ARMScheduleSwift.td | 308 "SMLALTB", "SMLALTT", "SMLALD", "SMLALDX", "SMLSLD", "SMLSLDX",
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| H A D | ARMScheduleA9.td | 2556 (instregex "SMLAD", "SMLADX", "SMLALD", "SMLALDX", "SMLSD", "SMLSDX",
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| H A D | ARMInstrInfo.td | 107 def ARMSmlald : SDNode<"ARMISD::SMLALD", SDT_LongMac>; 4685 (SMLALD GPRnopc:$Rn, GPRnopc:$Rm, GPRnopc:$RLo, GPRnopc:$RHi)>;
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| H A D | ARMInstrThumb2.td | 3178 // Dual halfword multiple: SMUAD, SMUSD, SMLAD, SMLSD, SMLALD, SMLSLD
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| H A D | ARMISelLowering.cpp | 1816 MAKE_CASE(ARMISD::SMLALD) in getTargetNodeName() 10461 Opc = ARMISD::SMLALD; in ReplaceLongIntrinsic()
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| /llvm-project-15.0.7/llvm/test/MC/Disassembler/ARM/ |
| H A D | basic-arm-instructions.txt | 1641 # SMLALD/SMLALDX
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| H A D | thumb2.txt | 1820 # SMLALD/SMLALDX
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| /llvm-project-15.0.7/llvm/test/MC/ARM/ |
| H A D | basic-arm-instructions.s | 2463 @ SMLALD/SMLALDX
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| H A D | basic-thumb2-instructions.s | 2572 @ SMLALD/SMLALDX
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| /llvm-project-15.0.7/llvm/lib/Target/ARM/AsmParser/ |
| H A D | ARMAsmParser.cpp | 8307 case ARM::SMLALD: in validateInstruction()
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