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Searched refs:SMLAD (Results 1 – 13 of 13) sorted by relevance

/llvm-project-15.0.7/llvm/lib/Target/ARM/
H A DARMParallelDSP.cpp181 void UpdateRoot(Instruction *SMLAD) { in UpdateRoot() argument
182 Root->replaceAllUsesWith(SMLAD); in UpdateRoot()
635 Function *SMLAD = nullptr; in InsertParallelMACs() local
637 SMLAD = Acc->getType()->isIntegerTy(32) ? in InsertParallelMACs()
641 SMLAD = Acc->getType()->isIntegerTy(32) ? in InsertParallelMACs()
647 Instruction *Call = Builder.CreateCall(SMLAD, Args); in InsertParallelMACs()
H A DARMScheduleR52.td277 "SMLAD", "SMLADX", "t2SMLAD", "t2SMLADX",
H A DARMScheduleSwift.td259 (instregex "SMLAD", "SMLADX", "t2SMLAD", "t2SMLADX")>;
H A DARMScheduleA57.td269 // SMLAWT, SMLAD{X}, SMLSD{X}, SMMLA{R}, SMMLS{R}
H A DARMScheduleA9.td2556 (instregex "SMLAD", "SMLADX", "SMLALD", "SMLALDX", "SMLSD", "SMLSDX",
H A DARMInstrThumb2.td3178 // Dual halfword multiple: SMUAD, SMUSD, SMLAD, SMLSD, SMLALD, SMLSLD
H A DARMInstrInfo.td4677 (SMLAD GPRnopc:$Rn, GPRnopc:$Rm, GPRnopc:$Ra)>;
/llvm-project-15.0.7/llvm/test/CodeGen/ARM/ParallelDSP/
H A Doverlapping.ll136 ; CHECK: [[SMLAD:%[^ ]+]] = call i32 @llvm.arm.smlad(i32 [[LD_A]], i32 [[LD_B]], i32 %acc)
142 ; CHECK: [[RES:%[^ ]+]] = call i32 @llvm.arm.smlad(i32 [[LD_A_2]], i32 [[LD_B_1]], i32 [[SMLAD]])
182 ; CHECK: [[SMLAD:%[^ ]+]] = call i32 @llvm.arm.smlad(i32 [[LD_A]], i32 [[LD_B]], i32 %acc)
188 ; CHECK: [[RES:%[^ ]+]] = call i32 @llvm.arm.smladx(i32 [[LD_A_2]], i32 [[LD_B_1]], i32 [[SMLAD]])
/llvm-project-15.0.7/llvm/test/MC/Disassembler/ARM/
H A Dinvalid-armv7.txt298 # Opcode=284 Name=SMLAD Format=ARM_FORMAT_MULFRM(1)
H A Dbasic-arm-instructions.txt1591 # SMLAD/SMLADX
H A Dthumb2.txt1769 # SMLAD/SMLADX
/llvm-project-15.0.7/llvm/test/MC/ARM/
H A Dbasic-arm-instructions.s2413 @ SMLAD/SMLADX
H A Dbasic-thumb2-instructions.s2520 @ SMLAD/SMLADX