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/llvm-project-15.0.7/clang/test/CodeGenCXX/
H A D2010-07-23-DeclLoc.cpp36 typedef _SIZE SIZE; typedef in SizeAndEndianness
42 template <typename SIZE> class TRange {
44 typename SIZE::ptr_t _location;
45 typename SIZE::size_t _length;
46 …TRange(typename SIZE::ptr_t location, typename SIZE::size_t length) : _location(location), _length… in TRange()
48 template <typename SIZE, typename T> class TRangeValue : public TRange<SIZE> {
51 …TRangeValue(typename SIZE::ptr_t location, typename SIZE::size_t length, T value) : TRange<SIZE>(l… in TRangeValue()
56 template <typename SIZE> class TRawSymbolOwnerData
58 TRangeValue< SIZE, uint8_t* > _TEXT_text_section;
77 typedef typename SIZE_AND_ENDIANNESS::SIZE SIZE; in create_symbol_owner_data_arch_specific() typedef
[all …]
/llvm-project-15.0.7/lld/test/ELF/
H A Dx86-64-reloc-size-shared.s44 .quad foo@SIZE-1
45 .quad foo@SIZE
46 .quad foo@SIZE+1
47 .quad fooshared@SIZE-1
48 .quad fooshared@SIZE
49 .quad fooshared@SIZE+1
55 movl foo@SIZE-1,%eax
56 movl foo@SIZE,%eax
57 movl foo@SIZE+1,%eax
58 movl fooshared@SIZE-1,%eax
[all …]
/llvm-project-15.0.7/libc/test/src/string/memory_utils/
H A Dmemory_access_test.cpp79 Observer.ObserveRead(src, SIZE); in copy()
84 Observer.ObserveRead(lhs, SIZE); in equals()
85 Observer.ObserveRead(rhs, SIZE); in equals()
90 Observer.ObserveRead(lhs, SIZE); in three_way_compare()
91 Observer.ObserveRead(rhs, SIZE); in three_way_compare()
169 expected.Touch(Size - ParamType::SIZE, ParamType::SIZE); in TearDown()
184 expected.Touch(Size - ParamType::SIZE, ParamType::SIZE); in TearDown()
198 for (size_t i = 0; i < Size - ParamType::SIZE; i += ParamType::SIZE) in TearDown()
200 expected.Touch(Size - ParamType::SIZE, ParamType::SIZE); in TearDown()
217 expected.Touch(AlignmentT::SIZE, ParamType::SIZE); in TearDown()
[all …]
H A Delements_test.cpp71 for (size_t i = 0; i < ParamType::SIZE; ++i) in TYPED_TEST()
83 constexpr size_t SIZE = ParamType::SIZE; in TYPED_TEST() local
84 using LargeBuffer = cpp::Array<char, SIZE * 2>; in TYPED_TEST()
88 for (size_t Offset = 0; Offset < SIZE; ++Offset) { in TYPED_TEST()
91 for (size_t I = 0; I < SIZE; ++I) in TYPED_TEST()
95 for (size_t Offset = 0; Offset < SIZE; ++Offset) { in TYPED_TEST()
97 move<ParamType>(&Buffer[Offset], &Buffer[SIZE]); in TYPED_TEST()
98 for (size_t I = 0; I < SIZE; ++I) in TYPED_TEST()
99 EXPECT_EQ(Buffer[I + Offset], GroundTruth[SIZE + I]); in TYPED_TEST()
117 for (size_t i = 0; i < ParamType::SIZE; ++i) { in TYPED_TEST()
[all …]
/llvm-project-15.0.7/libc/src/string/memory_utils/
H A Delements.h94 static constexpr size_t SIZE = ElementCount * Element::SIZE; member
157 static constexpr size_t SIZE = Head::SIZE + Chained<Tail...>::SIZE;
160 Chained<Tail...>::copy(dst + Head::SIZE, src + Head::SIZE);
166 Chained<Tail...>::move(dst + Head::SIZE, src + Head::SIZE);
173 return Chained<Tail...>::equals(lhs + Head::SIZE, rhs + Head::SIZE);
202 static_assert(ElementB::SIZE <= ElementA::SIZE, "ElementB too big");
204 static_assert((ElementA::SIZE + ElementB::SIZE) >= Size,
206 static constexpr size_t OFFSET = SIZE - ElementB::SIZE;
334 static_assert(T::SIZE == TailT::SIZE,
342 offset += T::SIZE;
[all …]
/llvm-project-15.0.7/llvm/test/Analysis/CostModel/AMDGPU/
H A Dfused_costs.ll7 …serve-sign -fp-contract=on < %s | FileCheck -check-prefixes=SLOWF64-SIZE,FUSED-SIZE,SLOWF32-SIZE %s
8 …th=ieee -fp-contract=on < %s | FileCheck -check-prefixes=SLOWF64-SIZE,FASTF32-SIZE,GFX9SLOW-SIZE %s
9 …th=ieee -fp-contract=fast < %s | FileCheck -check-prefixes=FUSED-SIZE,SLOWF32-SIZE,GFX9FAST-SIZE %s
10 …serve-sign -fp-contract=on < %s | FileCheck -check-prefixes=SLOWF64-SIZE,FUSED-SIZE,FASTF32-SIZE %s
46 ; SLOWF32-SIZE-LABEL: 'fmul_fadd_f32'
61 ; FASTF32-SIZE-LABEL: 'fmul_fadd_f32'
127 ; FUSED-SIZE-LABEL: 'fmul_fadd_f16'
140 ; FUSED-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void
142 ; GFX9SLOW-SIZE-LABEL: 'fmul_fadd_f16'
208 ; SLOWF64-SIZE-LABEL: 'fmul_fadd_f64'
[all …]
H A Dfptosi.ll21 ; ALL-SIZE-LABEL: 'fptosi_double_i64'
43 ; ALL-SIZE-LABEL: 'fptosi_double_i32'
72 ; FAST-SIZE-LABEL: 'fptosi_double_i16'
79 ; SLOW-SIZE-LABEL: 'fptosi_double_i16'
108 ; FAST-SIZE-LABEL: 'fptosi_double_i8'
115 ; SLOW-SIZE-LABEL: 'fptosi_double_i8'
138 ; ALL-SIZE-LABEL: 'fptosi_float_i64'
163 ; ALL-SIZE-LABEL: 'fptosi_float_i32'
196 ; FAST-SIZE-LABEL: 'fptosi_float_i16'
237 ; FAST-SIZE-LABEL: 'fptosi_float_i8'
[all …]
H A Dfptoui.ll21 ; ALL-SIZE-LABEL: 'fptoui_double_i64'
43 ; ALL-SIZE-LABEL: 'fptoui_double_i32'
72 ; FAST-SIZE-LABEL: 'fptoui_double_i16'
79 ; SLOW-SIZE-LABEL: 'fptoui_double_i16'
108 ; FAST-SIZE-LABEL: 'fptoui_double_i8'
115 ; SLOW-SIZE-LABEL: 'fptoui_double_i8'
138 ; ALL-SIZE-LABEL: 'fptoui_float_i64'
163 ; ALL-SIZE-LABEL: 'fptoui_float_i32'
196 ; FAST-SIZE-LABEL: 'fptoui_float_i16'
237 ; FAST-SIZE-LABEL: 'fptoui_float_i8'
[all …]
H A Dshifts.ll55 ; FAST64-SIZE-LABEL: 'shl'
76 ; FAST64-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void
78 ; SLOW64-SIZE-LABEL: 'shl'
99 ; SLOW64-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void
171 ; FAST64-SIZE-LABEL: 'lshr'
192 ; FAST64-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void
194 ; SLOW64-SIZE-LABEL: 'lshr'
215 ; SLOW64-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void
287 ; FAST64-SIZE-LABEL: 'ashr'
308 ; FAST64-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void
[all …]
H A Dadd-sub.ll4 …dhsa -mcpu=gfx900 -mattr=+half-rate-64-ops < %s | FileCheck -check-prefixes=ALL-SIZE,FAST16-SIZE %s
5 …cn-unknown-amdhsa -mattr=-half-rate-64-ops < %s | FileCheck -check-prefixes=ALL-SIZE,SLOW16-SIZE %s
21 ; ALL-SIZE-LABEL: 'add_i32'
31 ; ALL-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void
54 ; ALL-SIZE-LABEL: 'add_i64'
60 ; ALL-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void
93 ; FAST16-SIZE-LABEL: 'add_i16'
104 ; SLOW16-SIZE-LABEL: 'add_i16'
138 ; ALL-SIZE-LABEL: 'add_i8'
181 ; FAST16-SIZE-LABEL: 'sub'
[all …]
H A Dfmul.ll5 …hsa -mcpu=gfx90a -mattr=+half-rate-64-ops < %s | FileCheck -check-prefixes=GFX9-SIZE,GFX90A-SIZE %s
6 …own-amdhsa -mcpu=gfx900 -mattr=+half-rate-64-ops < %s | FileCheck -check-prefixes=SIZE,GFX9-SIZE %s
7 …e=amdgcn-unknown-amdhsa -mattr=-half-rate-64-ops < %s | FileCheck -check-prefixes=SIZE,SLOW-SIZE %s
31 ; GFX90A-SIZE-LABEL: 'fmul_f32'
41 ; SIZE-LABEL: 'fmul_f32'
49 ; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void
86 ; GFX90A-SIZE-LABEL: 'fmul_f64'
94 ; SIZE-LABEL: 'fmul_f64'
100 ; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void
131 ; GFX9-SIZE-LABEL: 'fmul_f16'
[all …]
H A Dbit-ops.ll47 ; SLOW16-SIZE-LABEL: 'or'
64 ; SLOW16-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void
66 ; FAST16-SIZE-LABEL: 'or'
83 ; FAST16-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void
143 ; SLOW16-SIZE-LABEL: 'xor'
160 ; SLOW16-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void
162 ; FAST16-SIZE-LABEL: 'xor'
179 ; FAST16-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void
239 ; SLOW16-SIZE-LABEL: 'and'
256 ; SLOW16-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void
[all …]
H A Dcast.ll26 ; ALL-SIZE-LABEL: 'add'
114 ; FAST-SIZE-LABEL: 'zext_sext'
219 ; ALL-SIZE-LABEL: 'masks8'
235 ; ALL-SIZE-LABEL: 'masks4'
268 ; FAST-SIZE-LABEL: 'sitofp4'
279 ; SLOW-SIZE-LABEL: 'sitofp4'
309 ; ALL-SIZE-LABEL: 'sitofp8'
346 ; FAST-SIZE-LABEL: 'uitofp4'
357 ; SLOW-SIZE-LABEL: 'uitofp4'
387 ; ALL-SIZE-LABEL: 'uitofp8'
[all …]
H A Dfsub.ll5 …x90a -mattr=+half-rate-64-ops < %s | FileCheck -check-prefixes=FASTF16-SIZE,GFX90A-FASTF64-SIZE %s
6 …=gfx900 -mattr=+half-rate-64-ops < %s | FileCheck -check-prefixes=NOPACKEDF32-SIZE,FASTF16-SIZE %s
7 …n-amdhsa -mattr=-half-rate-64-ops < %s | FileCheck -check-prefixes=NOPACKEDF32-SIZE,SLOWF64-SIZE %s
31 ; GFX90A-FASTF64-SIZE-LABEL: 'fsub_f32'
41 ; NOPACKEDF32-SIZE-LABEL: 'fsub_f32'
86 ; GFX90A-FASTF64-SIZE-LABEL: 'fsub_f64'
94 ; NOPACKEDF32-SIZE-LABEL: 'fsub_f64'
131 ; FASTF16-SIZE-LABEL: 'fsub_f16'
139 ; FASTF16-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void
141 ; SLOWF64-SIZE-LABEL: 'fsub_f16'
[all …]
H A Dfadd.ll5 …x90a -mattr=+half-rate-64-ops < %s | FileCheck -check-prefixes=FASTF16-SIZE,GFX90A-FASTF64-SIZE %s
6 …=gfx900 -mattr=+half-rate-64-ops < %s | FileCheck -check-prefixes=NOPACKEDF32-SIZE,FASTF16-SIZE %s
7 …n-amdhsa -mattr=-half-rate-64-ops < %s | FileCheck -check-prefixes=NOPACKEDF32-SIZE,SLOWF64-SIZE %s
31 ; GFX90A-FASTF64-SIZE-LABEL: 'fadd_f32'
41 ; NOPACKEDF32-SIZE-LABEL: 'fadd_f32'
86 ; GFX90A-FASTF64-SIZE-LABEL: 'fadd_f64'
94 ; NOPACKEDF32-SIZE-LABEL: 'fadd_f64'
131 ; FASTF16-SIZE-LABEL: 'fadd_f16'
139 ; FASTF16-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void
141 ; SLOWF64-SIZE-LABEL: 'fadd_f16'
[all …]
H A Dextractelement.ll5 …1 -disable-output -mtriple=amdgcn-unknown-amdhsa %s | FileCheck -check-prefixes=GCN-SIZE,CI-SIZE %s
6 …put -mtriple=amdgcn-unknown-amdhsa -mcpu=fiji %s | FileCheck -check-prefixes=GCN-SIZE,GFX89-SIZE %s
7 …t -mtriple=amdgcn-unknown-amdhsa -mcpu=gfx900 %s | FileCheck -check-prefixes=GCN-SIZE,GFX89-SIZE %s
36 ; GCN-SIZE-LABEL: 'extractelement_32'
59 ; GCN-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void
116 ; GCN-SIZE-LABEL: 'extractelement_64'
139 ; GCN-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void
194 ; GCN-SIZE-LABEL: 'extractelement_8'
295 ; CI-SIZE-LABEL: 'extractelement_16'
318 ; CI-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void
[all …]
H A Dinsertelement.ll26 ; ALL-SIZE-LABEL: 'insertelement_i8'
87 ; CI-SIZE-LABEL: 'insertelement_i16'
102 ; GFX89-SIZE-LABEL: 'insertelement_i16'
148 ; ALL-SIZE-LABEL: 'insertelement_i32'
194 ; ALL-SIZE-LABEL: 'insertelement_i64'
290 ; ALL-SIZE-LABEL: 'insert_float_poison'
347 ; ALL-SIZE-LABEL: 'insert_i64_poison'
398 ; ALL-SIZE-LABEL: 'insert_i32_poison'
491 ; CI-SIZE-LABEL: 'insert_i16_poison'
605 ; ALL-SIZE-LABEL: 'insert_i8_poison'
[all …]
H A Dfneg.ll17 ; SIZE-LABEL: 'fneg_f32'
18 ; SIZE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %f32 = fneg float undef
25 ; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void
46 ; SIZE-LABEL: 'fneg_f64'
47 ; SIZE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %f64 = fneg double undef
52 ; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void
73 ; SIZE-LABEL: 'fneg_f16'
74 ; SIZE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %f16 = fneg half undef
81 ; SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void
105 ; SIZE-LABEL: 'fneg_idiom'
[all …]
H A Dfdiv.ll26 ; ALL-SIZE-LABEL: 'fdiv_f32_ieee'
118 ; CI-SIZE-LABEL: 'fdiv_f64'
126 ; SI-SIZE-LABEL: 'fdiv_f64'
134 ; FP16-SIZE-LABEL: 'fdiv_f64'
343 ; CI-SIZE-LABEL: 'rcp_ieee'
361 ; SI-SIZE-LABEL: 'rcp_ieee'
379 ; FP16-SIZE-LABEL: 'rcp_ieee'
506 ; CI-SIZE-LABEL: 'rcp_ftzdaz'
634 ; CI-SIZE-LABEL: 'frem'
645 ; SI-SIZE-LABEL: 'frem'
[all …]
/llvm-project-15.0.7/openmp/libomptarget/test/mapping/
H A Dtarget_data_array_extension_at_exit.c27 #define SIZE 100 macro
30 # define SMALL_BEG (SIZE-2)
31 # define SMALL_END SIZE
33 # define LARGE_END SIZE
38 # define LARGE_END SIZE
47 int arr[SIZE]; in check_not_present()
49 for (int i = 0; i < SIZE; ++i) in check_not_present()
68 for (int i = 0; i < SIZE; ++i) { in check_not_present()
75 int arr[SIZE]; in check_is_present()
77 for (int i = 0; i < SIZE; ++i) in check_is_present()
[all …]
/llvm-project-15.0.7/llvm/test/tools/llvm-nm/X86/
H A Dsize-sort.test1 # RUN: llvm-nm --size-sort %p/Inputs/hello.obj.elf-x86_64 | FileCheck --check-prefix=SIZE-SORT-NO-A…
2 # RUN: llvm-nm --size-sort -S %p/Inputs/hello.obj.elf-x86_64 | FileCheck --check-prefix=SIZE-SORT-P…
3 # RUN: llvm-nm -S %p/Inputs/hello.obj.elf-x86_64 | FileCheck --check-prefix=NO-SIZE-SORT-PRINT-ADDR…
5 # SIZE-SORT-NO-ADDR: U puts
6 # SIZE-SORT-NO-ADDR: 0000000000000015 T main
8 # SIZE-SORT-PRINT-ADDR: U puts
9 # SIZE-SORT-PRINT-ADDR: 0000000000000000 0000000000000015 T main
11 # NO-SIZE-SORT-PRINT-ADDR: 0000000000000000 0000000000000015 T main
12 # NO-SIZE-SORT-PRINT-ADDR: U puts
/llvm-project-15.0.7/llvm/test/Analysis/CostModel/ARM/
H A Dlogicalop.ll43 ; CHECK-MVE-SIZE-LABEL: 'op'
48 ; CHECK-MVE-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void
50 ; CHECK-NEON-SIZE-LABEL: 'op'
55 ; CHECK-NEON-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void
57 ; CHECK-THUMB1-SIZE-LABEL: 'op'
64 ; CHECK-THUMB2-SIZE-LABEL: 'op'
108 ; CHECK-MVE-SIZE-LABEL: 'vecop'
113 ; CHECK-MVE-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void
115 ; CHECK-NEON-SIZE-LABEL: 'vecop'
122 ; CHECK-THUMB1-SIZE-LABEL: 'vecop'
[all …]
H A Dcmps.ll86 ; CHECK-MVE-SIZE-LABEL: 'cmps'
102 ; CHECK-MVE-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef
104 ; CHECK-V8M-MAIN-SIZE-LABEL: 'cmps'
122 ; CHECK-V8M-BASE-SIZE-LABEL: 'cmps'
140 ; CHECK-V8R-SIZE-LABEL: 'cmps'
237 ; CHECK-MVE-SIZE-LABEL: 'minmax'
250 ; CHECK-MVE-SIZE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void
252 ; CHECK-V8M-MAIN-SIZE-LABEL: 'minmax'
267 ; CHECK-V8M-BASE-SIZE-LABEL: 'minmax'
282 ; CHECK-V8R-SIZE-LABEL: 'minmax'
[all …]
/llvm-project-15.0.7/llvm/test/tools/yaml2obj/ELF/
H A Dllvm-addrsig-section.yaml180 # SIZE: Name: .llvm_addrsig
181 # SIZE: Size:
182 # SIZE-SAME: 17
183 # SIZE: SectionData (
186 # SIZE-NEXT: )
204 # SIZE-CONTENT: Size:
205 # SIZE-CONTENT-SAME: 5
208 # SIZE-CONTENT-NEXT: )
211 # SIZE-CONTENT: Size:
212 # SIZE-CONTENT-SAME: 3
[all …]
/llvm-project-15.0.7/clang/test/Analysis/
H A Duninit-val-const-likeness.c4 #define SIZE 2 macro
11 int tmpList[SIZE] = {0}; in create()
17 int fooList[SIZE]; in work()
27 int tmpList[SIZE] = {0}; in create2()
33 int fooList[SIZE]; in work2()
43 int tmpList[SIZE] = {0}; in create3()
49 int fooList[SIZE]; in work3()
62 int tmpList[SIZE] = {0}; in create4()
68 int fooList[SIZE]; in work4()

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