Searched refs:SExtOp (Results 1 – 7 of 7) sorted by relevance
| /llvm-project-15.0.7/mlir/lib/Conversion/GPUCommon/ |
| H A D | IndexIntrinsicsOpLowering.h | 53 newOp = rewriter.create<LLVM::SExtOp>( in matchAndRewrite()
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| /llvm-project-15.0.7/mlir/lib/Conversion/ArithmeticToLLVM/ |
| H A D | ArithmeticToLLVM.cpp | 53 VectorConvertToLLVMPattern<arith::ExtSIOp, LLVM::SExtOp>;
148 rewriter.replaceOpWithNewOp<LLVM::SExtOp>(op, targetType, adaptor.getIn()); in matchAndRewrite()
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| /llvm-project-15.0.7/mlir/lib/Conversion/GPUToNVVM/ |
| H A D | LowerGpuOpsToNVVMOps.cpp | 140 newOp = rewriter.create<LLVM::SExtOp>( in matchAndRewrite()
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| /llvm-project-15.0.7/mlir/lib/Conversion/SPIRVToLLVM/ |
| H A D | SPIRVToLLVM.cpp | 1184 extended = rewriter.template create<LLVM::SExtOp>(loc, dstType, in matchAndRewrite()
1478 IndirectCastPattern<spirv::SConvertOp, LLVM::SExtOp, LLVM::TruncOp>, in populateSPIRVToLLVMConversionPatterns()
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| /llvm-project-15.0.7/mlir/lib/Conversion/AsyncToLLVM/ |
| H A D | AsyncToLLVM.cpp | 519 op, rewriter.create<LLVM::SExtOp>(loc, i32, coroSuspend.getResult()), in matchAndRewrite()
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| /llvm-project-15.0.7/flang/lib/Optimizer/CodeGen/ |
| H A D | CodeGen.cpp | 135 return rewriter.create<mlir::LLVM::SExtOp>(loc, ty, val); in integerCast()
860 rewriter.replaceOpWithNewOp<mlir::LLVM::SExtOp>(convert, toTy, op0); in matchAndRewrite()
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| /llvm-project-15.0.7/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 8216 SDValue SExtOp = DAG.getNode(ISD::SIGN_EXTEND_INREG, N, OpVT, in performSETCCCombine() local
8218 return DAG.getSetCC(dl, VT, SExtOp, DAG.getConstant(C1.trunc(32).sext(64), in performSETCCCombine()
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