Searched refs:SET1 (Results 1 – 7 of 7) sorted by relevance
| /llvm-project-15.0.7/llvm/test/CodeGen/X86/ |
| H A D | memcpy-scoped-aa.ll | 11 ; MIR-DAG: ![[SET1:[0-9]+]] = !{![[SCOPE1]]} 14 …$noreg, 16, $noreg :: (load (s64) from %ir.p1, align 4, !alias.scope ![[SET0]], !noalias ![[SET1]]) 15 …eg, 24, $noreg :: (load (s64) from %ir.p1 + 8, align 4, !alias.scope ![[SET0]], !noalias ![[SET1]]) 16 …eg, killed %3 :: (store (s64) into %ir.p0 + 8, align 4, !alias.scope ![[SET0]], !noalias ![[SET1]]) 17 …$noreg, killed %2 :: (store (s64) into %ir.p0, align 4, !alias.scope ![[SET0]], !noalias ![[SET1]]) 31 …$noreg, 16, $noreg :: (load (s64) from %ir.p1, align 4, !alias.scope ![[SET0]], !noalias ![[SET1]]) 34 …$noreg, killed %2 :: (store (s64) into %ir.p0, align 4, !alias.scope ![[SET0]], !noalias ![[SET1]]) 48 …$noreg, 16, $noreg :: (load (s64) from %ir.p1, align 4, !alias.scope ![[SET0]], !noalias ![[SET1]]) 50 …$noreg, killed %2 :: (store (s64) into %ir.p0, align 4, !alias.scope ![[SET0]], !noalias ![[SET1]]) 66 …8, $noreg, %2 :: (store (s64) into %ir.p0 + 8, align 4, !alias.scope ![[SET0]], !noalias ![[SET1]]) [all …]
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| H A D | 2010-05-26-DotDebugLoc.ll | 67 ; CHECK-NEXT: .set [[SET1:.*]], Lfunc_begin0-Lfunc_begin0 68 ; CHECK-NEXT: .quad [[SET1]]
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| /llvm-project-15.0.7/llvm/test/CodeGen/AArch64/ |
| H A D | memcpy-scoped-aa.ll | 9 ; MIR-DAG: ![[SET1:[0-9]+]] = !{![[SCOPE1]]} 12 …28 = LDRQui %0, 1 :: (load (s128) from %ir.p1, align 4, !alias.scope ![[SET0]], !noalias ![[SET1]]) 13 …killed %2, %0, 0 :: (store (s128) into %ir.p0, align 4, !alias.scope ![[SET0]], !noalias ![[SET1]]) 35 …28 = LDRQui %0, 1 :: (load (s128) from %ir.p1, align 4, !alias.scope ![[SET0]], !noalias ![[SET1]]) 36 …killed %2, %0, 0 :: (store (s128) into %ir.p0, align 4, !alias.scope ![[SET0]], !noalias ![[SET1]]) 58 …28 = LDRQui %0, 1 :: (load (s128) from %ir.p1, align 4, !alias.scope ![[SET0]], !noalias ![[SET1]]) 59 …killed %2, %0, 0 :: (store (s128) into %ir.p0, align 4, !alias.scope ![[SET0]], !noalias ![[SET1]]) 82 …Xui %2, %0, 1 :: (store (s64) into %ir.p0 + 8, align 4, !alias.scope ![[SET0]], !noalias ![[SET1]]) 83 … STRXui %2, %0, 0 :: (store (s64) into %ir.p0, align 4, !alias.scope ![[SET0]], !noalias ![[SET1]]) 103 …28 = LDRQui %0, 1 :: (load (s128) from %ir.p1, align 1, !alias.scope ![[SET0]], !noalias ![[SET1]]) [all …]
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| H A D | merge-scoped-aa-store.ll | 11 ; MIR-DAG: ![[SET1:[0-9]+]] = !{![[SCOPE1]]} 17 ; MIR: LDRDui %0, 0 :: (load (s64) from %ir.g0, align 4, !alias.scope ![[SET0]], !noalias ![[SET1]]) 18 ; MIR: STRDui killed %5, %1, 0 :: (store (s64) into %ir.tmp41, align 4, !alias.scope ![[SET1]], !no… 37 ; MIR: LDRDui %0, 0 :: (load (s64) from %ir.g0, align 4, !alias.scope ![[SET0]], !noalias ![[SET1]])
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| /llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/ |
| H A D | memcpy-scoped-aa.ll | 12 ; MIR-DAG: ![[SET1:[0-9]+]] = !{![[SCOPE1]]} 15 …exec :: (load (s128) from %ir.p1, align 4, !alias.scope ![[SET0]], !noalias ![[SET1]], addrspace 1) 16 …xec :: (store (s128) into %ir.p0, align 4, !alias.scope ![[SET0]], !noalias ![[SET1]], addrspace 1) 37 …exec :: (load (s128) from %ir.p1, align 4, !alias.scope ![[SET0]], !noalias ![[SET1]], addrspace 1) 38 …xec :: (store (s128) into %ir.p0, align 4, !alias.scope ![[SET0]], !noalias ![[SET1]], addrspace 1) 59 …exec :: (load (s128) from %ir.p1, align 4, !alias.scope ![[SET0]], !noalias ![[SET1]], addrspace 1) 60 …xec :: (store (s128) into %ir.p0, align 4, !alias.scope ![[SET0]], !noalias ![[SET1]], addrspace 1) 81 …xec :: (store (s128) into %ir.p0, align 4, !alias.scope ![[SET0]], !noalias ![[SET1]], addrspace 1)
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| /llvm-project-15.0.7/llvm/lib/Support/ |
| H A D | regexec.c | 62 #define SET1(v, n) ((v) |= (unsigned long)1 << (n)) macro 88 #undef SET1 109 #define SET1(v, n) ((v)[n] = 1) macro
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| H A D | regengine.inc | 731 SET1(st, startst); 817 SET1(st, startst);
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