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Searched refs:S28 (Results 1 – 14 of 14) sorted by relevance

/llvm-project-15.0.7/llvm/test/CodeGen/X86/
H A Dcrash-nosse.ll16 %S28 = fcmp ord double 0x3ED1A1F787BB2185, 0x3EE59DE55A8DF890
17 br i1 %S28, label %CF, label %CF39
/llvm-project-15.0.7/clang/test/PCH/
H A Dcxx-key-functions.cpp36 struct S28 { virtual void f(); }; struct
84 S20, S21, S22, S23, S24, S25, S26, S27, S28, S29,
/llvm-project-15.0.7/clang/test/CodeGenCXX/
H A Dmicrosoft-abi-static-initializers.cpp87 static S S28; in MultipleStatics() local
/llvm-project-15.0.7/polly/lib/External/isl/test_inputs/codegen/cloog/
H A Dswim.c31 S28(c0, c1);
H A Dswim.st1 …i1] : M = 1 and i0 >= 2 and i0 <= P and i1 >= 1 and i1 <= R; S9[] : M = 1; S28[i0, i1] : M = 1 and…
33 - filter: "[M, N, O, P, Q, R] -> { S30[i0, i1]; S28[i0, i1]; S31[i0]; S29[i0, i1] }"
35 … R] -> [{ S31[i0] -> [(i0)]; S29[i0, i1] -> [(i0)]; S30[i0, i1] -> [(i0)]; S28[i0, i1] -> [(i0)] }…
39 - filter: "[M, N, O, P, Q, R] -> { S30[i0, i1]; S28[i0, i1]; S29[i0, i1] }"
41 …schedule: "[M, N, O, P, Q, R] -> [{ S29[i0, i1] -> [(i1)]; S30[i0, i1] -> [(i1)]; S28[i0, i1] -> […
45 - filter: "[M, N, O, P, Q, R] -> { S28[i0, i1] }"
/llvm-project-15.0.7/llvm/lib/Target/AArch64/
H A DAArch64PBQPRegAlloc.cpp110 case AArch64::S28: in isOdd()
H A DAArch64RegisterInfo.td357 def S28 : AArch64Reg<28, "s28", [H28]>, DwarfRegAlias<B28>;
392 def D28 : AArch64Reg<28, "d28", [S28], ["v28", ""]>, DwarfRegAlias<B28>;
/llvm-project-15.0.7/llvm/lib/Target/ARM/
H A DARMRegisterInfo.td116 def S28 : ARMFReg<28, "s28">; def S29 : ARMFReg<29, "s29">;
135 def D14 : ARMReg<14, "d14", [S28, S29]>, DwarfRegNum<[270]>;
/llvm-project-15.0.7/llvm/lib/Target/ARM/MCTargetDesc/
H A DARMMCTargetDesc.cpp277 {codeview::RegisterId::ARM_FS28, ARM::S28}, in initLLVMToCVRegMapping()
/llvm-project-15.0.7/llvm/lib/Target/AArch64/MCTargetDesc/
H A DAArch64MCTargetDesc.cpp166 {codeview::RegisterId::ARM64_S28, AArch64::S28}, in initLLVMToCVRegMapping()
/llvm-project-15.0.7/mlir/test/Dialect/Vector/
H A Dvector-transforms.mlir124 // CHECK-NEXT: %[[S28:.*]] = vector.extract_strided_slice %{{.*}} {offsets = [0, 0], sizes = [2, 2]…
127 …arallel", "parallel", "reduction"], kind = #vector.kind<add>} %[[S27]], %[[S28]], %[[S29]], %[[S30…
/llvm-project-15.0.7/llvm/lib/Target/PowerPC/
H A DPPCCallingConv.td280 S23, S24, S25, S26, S27, S28, S29, S30, S31
H A DPPCFrameLowering.cpp197 {PPC::S28, -32}, in getCalleeSavedSpillSlots()
/llvm-project-15.0.7/llvm/lib/Target/ARM/Disassembler/
H A DARMDisassembler.cpp1500 ARM::S28, ARM::S29, ARM::S30, ARM::S31