Home
last modified time | relevance | path

Searched refs:S22 (Results 1 – 21 of 21) sorted by relevance

/llvm-project-15.0.7/polly/lib/External/isl/test_inputs/codegen/cloog/
H A Dusvd_e_t.c57 S22(7, 5, 0);
65 S22(7, 6, 0);
74 S22(7, 9, 0);
143 S22(8, 5, 1);
157 S22(8, 6, 1);
175 S22(8, 9, 1);
227 S22(9, 5, 2);
241 S22(9, 6, 2);
253 S22(9, 7, 2);
264 S22(9, 8, 2);
[all …]
H A Dusvd_e_t.st1 domain: "{ S22[i0, i1, -7 + i0] : i0 >= 7 and i1 >= 5 and i1 <= 9 and i0 <= 10; S21[i0, i1, -7 + i0…
5 …S22[i0, i1, i2] -> [(i0)]; S16[i0, i1, i2] -> [(i0)]; S17[i0, i1, i2] -> [(i0)]; S25[i0, i1, i2] -…
30 - filter: "{ S22[i0, i1, i2] }"
H A Dswim.c23 S22();
H A Dswim.st1 …<= Q; S64[i0, i1] : M = 1 and i0 >= 2 and i0 <= P and i1 >= 1 and i1 <= Q; S22[] : M = 1; S15[] : …
27 - filter: "[M, N, O, P, Q, R] -> { S22[] }"
/llvm-project-15.0.7/clang/test/CodeGenCXX/
H A Dwarn-padded-packed.cpp113 struct S22 { // expected-warning {{packed attribute is unnecessary for 'S22'}} struct
152 S14*, S15*, S16*, S17*, S18*, S19*, S20*, S21*, S22*, S23*, S24*, S25*, in f() argument
H A Dmicrosoft-abi-static-initializers.cpp81 static S S22; in MultipleStatics() local
/llvm-project-15.0.7/clang/test/PCH/
H A Dcxx-key-functions.cpp30 struct S22 { virtual void f(); }; struct
84 S20, S21, S22, S23, S24, S25, S26, S27, S28, S29,
/llvm-project-15.0.7/clang/test/Misc/
H A Ddiag-template-diffing.cpp570 template<typename T> struct S22 {}; struct
571 template<typename T> using U22 = volatile S22<T>;
/llvm-project-15.0.7/llvm/lib/Target/AArch64/
H A DAArch64PBQPRegAlloc.cpp107 case AArch64::S22: in isOdd()
H A DAArch64RegisterInfo.td351 def S22 : AArch64Reg<22, "s22", [H22]>, DwarfRegAlias<B22>;
386 def D22 : AArch64Reg<22, "d22", [S22], ["v22", ""]>, DwarfRegAlias<B22>;
/llvm-project-15.0.7/llvm/lib/Target/Hexagon/
H A DHexagonRegisterInfo.td311 def S22 : Rs<22, "s22", ["s22"]>, DwarfRegNum<[166]>;
385 def S23_22 : Rss<22, "s23:22", [S22, S23]>, DwarfRegNum<[166]>;
602 EVB, MODECTL, SYSCFG, S20, VID, S22, S24,
/llvm-project-15.0.7/clang/test/Modules/
H A Dodr_hash.cpp3111 struct S22 { struct
3117 struct S22 { struct
3123 S22 s22;
/llvm-project-15.0.7/llvm/lib/Target/ARM/
H A DARMRegisterInfo.td113 def S22 : ARMFReg<22, "s22">; def S23 : ARMFReg<23, "s23">;
132 def D11 : ARMReg<11, "d11", [S22, S23]>, DwarfRegNum<[267]>;
H A DARMCallingConv.td116 CCIfType<[f32], CCAssignToReg<[S16, S17, S18, S19, S20, S21, S22, S23]>>,
/llvm-project-15.0.7/llvm/lib/Target/ARM/MCTargetDesc/
H A DARMMCTargetDesc.cpp271 {codeview::RegisterId::ARM_FS22, ARM::S22}, in initLLVMToCVRegMapping()
/llvm-project-15.0.7/llvm/lib/Target/AArch64/MCTargetDesc/
H A DAArch64MCTargetDesc.cpp160 {codeview::RegisterId::ARM64_S22, AArch64::S22}, in initLLVMToCVRegMapping()
/llvm-project-15.0.7/mlir/test/Dialect/Vector/
H A Dvector-transforms.mlir111 // CHECK-NEXT: %[[S22:.*]] = vector.constant_mask [2, 2] : vector<2x2xi1>
112 …"], kind = #vector.kind<add>} %[[S19]], %[[S20]], %[[R1S02]], %[[S21]], %[[S22]] : vector<2x2xf32>…
/llvm-project-15.0.7/llvm/lib/Target/PowerPC/
H A DPPCCallingConv.td279 def CSR_SPE : CalleeSavedRegs<(add S14, S15, S16, S17, S18, S19, S20, S21, S22,
H A DPPCFrameLowering.cpp203 {PPC::S22, -80}, in getCalleeSavedSpillSlots()
/llvm-project-15.0.7/llvm/lib/Target/Hexagon/Disassembler/
H A DHexagonDisassembler.cpp785 Hexagon::VID, Hexagon::S22, Hexagon::S23,
/llvm-project-15.0.7/llvm/lib/Target/ARM/Disassembler/
H A DARMDisassembler.cpp1498 ARM::S20, ARM::S21, ARM::S22, ARM::S23,