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/llvm-project-15.0.7/llvm/lib/Target/Hexagon/
H A DHexagonRegisterInfo.td95 // Rss - 64-bit system registers.
96 class Rss<bits<7> num, string n, list<Register> subregs,
373 def SGP1_0 : Rss<0, "s1:0", [SGP0, SGP1], ["sgp1:0"]>, DwarfRegNum<[144]>;
374 def S3_2 : Rss<2, "s3:2", [STID, ELR]>, DwarfRegNum<[146]>;
375 def S5_4 : Rss<4, "s5:4", [BADVA0, BADVA1], ["badva1:0"]>,
377 def S7_6 : Rss<6, "s7:6", [SSR, CCR], ["ccr:ssr"]>, DwarfRegNum<[150]>;
378 def S9_8 : Rss<8, "s9:8", [HTID, BADVA]>, DwarfRegNum<[152]>;
379 def S11_10 : Rss<10, "s11:10", [IMASK, S11]>, DwarfRegNum<[154]>;
380 def S13_12 : Rss<12, "s13:12", [S12, S13]>, DwarfRegNum<[156]>;
381 def S15_14 : Rss<14, "s15:14", [S14, S15]>, DwarfRegNum<[158]>;
[all …]
H A DHexagonIntrinsicsV5.td24 //Rdd=vrmpyweh(Rss,Rtt)[:<<1]
28 //Rdd=vrmpywoh(Rss,Rtt)[:<<1]
32 //Rdd+=vrmpyweh(Rss,Rtt)[:<<1]
36 //Rdd=vrmpywoh(Rss,Rtt)[:<<1]
61 //Rxx^=asr(Rss,Rt)
63 //Rxx^=asl(Rss,Rt)
65 //Rxx^=lsr(Rss,Rt)
67 //Rxx^=lsl(Rss,Rt)
154 // Rdd=vcnegh(Rss,Rt)
315 //Rdd[+]=vrmpybsu(Rss,Rtt)
[all …]
H A DHexagonPatterns.td1066 def: Pat<(bswap I64:$Rss), (Combinew (A2_swiz (LoReg $Rss)),
1532 def: Pat<(v4i16 (mulhs V4I16:$Rss, V4I16:$Rtt)), (Mulhsh $Rss, $Rtt)>;
1662 (HiReg $Rss),
1667 def : Pat <(mulhu I64:$Rss, I64:$Rtt), (MulHU $Rss, $Rtt)>;
1682 (Combinew (S2_clrbit_i (HiReg $Rss), 31), (i32 (LoReg $Rss)))>;
1754 def: Pat<(i32 (trunc (ctlz I64:$Rss))), (S2_cl0p I64:$Rss)>;
1758 def: Pat<(i32 (trunc (cttz I64:$Rss))), (S2_ct0p I64:$Rss)>;
1762 def: Pat<(i32 (trunc (ctlz (not I64:$Rss)))), (S2_cl1p I64:$Rss)>;
1766 def: Pat<(i32 (trunc (cttz (not I64:$Rss)))), (S2_ct1p I64:$Rss)>;
1774 def: Pat<(i64 (ctpop I64:$Rss)), (ToZext64 (S5_popcountp I64:$Rss))>;
[all …]
/llvm-project-15.0.7/llvm/test/CodeGen/Hexagon/
H A Dmapped_intrinsics.ll9 ; if (#u6 == 0) Assembler mapped to: Rdd = combine(Rss.H32,Rss.L32)
10 ; else Rdd = asr(Rss,#u6-1):rnd
12 ; if (#u4 == 0) Assembler mapped to: Rdd = combine(Rss.H32,Rss.L32)
13 ; else Rdd = vasrh(Rss,#u4-1):raw
15 ; if (#u4 == 0) Assembler mapped to: Rd = vsathub(Rss)
16 ; else Rd = vasrhub(Rss,#u4-1):raw
/llvm-project-15.0.7/clang/test/Sema/
H A Dbuiltins-hexagon-v65.c13 unsigned builtin_needs_v65(unsigned long long Rss, unsigned long long Rtt) { in builtin_needs_v65() argument
14 return __builtin_HEXAGON_A6_vcmpbeq_notany(Rss, Rtt); in builtin_needs_v65()
H A Dbuiltins-hexagon-v55.c21 unsigned builtin_needs_v65(unsigned long long Rss, unsigned long long Rtt) { in builtin_needs_v65() argument
23 return __builtin_HEXAGON_A6_vcmpbeq_notany(Rss, Rtt); in builtin_needs_v65()
H A Dbuiltins-hexagon-v60.c21 unsigned builtin_needs_v65(unsigned long long Rss, unsigned long long Rtt) { in builtin_needs_v65() argument
23 return __builtin_HEXAGON_A6_vcmpbeq_notany(Rss, Rtt); in builtin_needs_v65()
H A Dbuiltins-hexagon-v62.c21 unsigned builtin_needs_v65(unsigned long long Rss, unsigned long long Rtt) { in builtin_needs_v65() argument
23 return __builtin_HEXAGON_A6_vcmpbeq_notany(Rss, Rtt); in builtin_needs_v65()
/llvm-project-15.0.7/llvm/lib/Target/Hexagon/AsmParser/
H A DHexagonAsmParser.cpp1737 MCOperand &Rss = Inst.getOperand(1); in processInstruction() local
1745 unsigned int RegPairNum = RI->getEncodingValue(Rss.getReg()); in processInstruction()
1748 Rss.setReg(matchRegister(Reg1)); in processInstruction()
1754 TmpInst.addOperand(Rss); in processInstruction()
1821 MCOperand &Rss = Inst.getOperand(2); in processInstruction() local
1838 TmpInst.addOperand(Rss); in processInstruction()
1881 MCOperand &Rss = Inst.getOperand(1); in processInstruction() local
1889 unsigned int RegPairNum = RI->getEncodingValue(Rss.getReg()); in processInstruction()
1892 Rss.setReg(matchRegister(Reg1)); in processInstruction()
1898 TmpInst.addOperand(Rss); in processInstruction()
/llvm-project-15.0.7/compiler-rt/lib/scudo/standalone/
H A Dprimary64.h412 void getStats(ScopedString *Str, uptr ClassId, uptr Rss) { in getStats() argument
424 TotalChunks, Rss >> 10, Region->ReleaseInfo.RangesReleased, in getStats()
H A Dprimary32.h412 void getStats(ScopedString *Str, uptr ClassId, uptr Rss) { in getStats() argument
422 AvailableChunks, Rss >> 10, Sci->ReleaseInfo.RangesReleased); in getStats()