| /llvm-project-15.0.7/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelDAGToDAG.cpp | 122 Rotate(0) {} in RxSBGOperands() 130 unsigned Rotate; member 757 if (RxSBG.Rotate != 0) in refineRxSBGMask() 758 Mask = (Mask << RxSBG.Rotate) | (Mask >> (64 - RxSBG.Rotate)); in refineRxSBGMask() 770 if (RxSBG.Rotate != 0) in maskMatters() 771 Mask = ((Mask << RxSBG.Rotate) | (Mask >> (64 - RxSBG.Rotate))); in maskMatters() 843 RxSBG.Rotate = (RxSBG.Rotate + CountNode->getZExtValue()) & 63; in expandRxSBG() 904 RxSBG.Rotate = (RxSBG.Rotate + Count) & 63; in expandRxSBG() 932 RxSBG.Rotate = (RxSBG.Rotate - Count) & 63; in expandRxSBG() 982 if (RISBG.Rotate == 0) { in tryRISBGZero() [all …]
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| H A D | SystemZScheduleZ196.td | 468 // Rotate 471 // Rotate and insert 477 // Rotate and Select
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| H A D | SystemZScheduleZEC12.td | 479 // Rotate 482 // Rotate and insert 488 // Rotate and Select
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| H A D | SystemZInstrInfo.cpp | 270 unsigned Rotate = (DestIsHigh != SrcIsHigh ? 32 : 0); in emitGRX32Move() local 274 .addImm(32 - Size).addImm(128 + 31).addImm(Rotate); in emitGRX32Move()
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| H A D | SystemZScheduleZ13.td | 505 // Rotate 508 // Rotate and insert 514 // Rotate and Select
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| H A D | SystemZScheduleZ16.td | 529 // Rotate 532 // Rotate and insert 538 // Rotate and Select
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| H A D | SystemZScheduleZ15.td | 529 // Rotate 532 // Rotate and insert 538 // Rotate and Select
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| H A D | SystemZScheduleZ14.td | 515 // Rotate 518 // Rotate and insert 524 // Rotate and Select
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| H A D | SystemZInstrInfo.td | 1503 // Rotate left. 1507 // Rotate second operand left and inserted selected bits into first operand. 1533 // Rotate second operand left and perform a logical operation with selected
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| /llvm-project-15.0.7/llvm/lib/Target/RISCV/MCTargetDesc/ |
| H A D | RISCVMatInt.cpp | 368 if (unsigned Rotate = extractRotateInfo(Val)) { in generateInstSeq() local 371 ((uint64_t)Val >> (64 - Rotate)) | ((uint64_t)Val << Rotate); in generateInstSeq() 374 TmpSeq.push_back(RISCVMatInt::Inst(RISCV::RORI, Rotate)); in generateInstSeq()
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| /llvm-project-15.0.7/clang-tools-extra/clangd/ |
| H A D | FuzzyMatch.cpp | 165 auto Rotate = [&](CharType T) { Types = ((Types << 2) | T) & 0x3f; }; in calculateRoles() local 170 Rotate(Type); in calculateRoles() 174 Rotate(Empty); in calculateRoles()
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| /llvm-project-15.0.7/llvm/lib/Target/Hexagon/ |
| H A D | HexagonIntrinsicsV5.td | 176 // Rotate and reduce bytes 181 // Rotate and reduce bytes with accumulation
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| /llvm-project-15.0.7/llvm/test/Feature/ |
| H A D | optnone-opt.ll | 79 ; LOOP-DAG: Skipping pass 'Rotate Loops'
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| /llvm-project-15.0.7/clang/include/clang/Basic/ |
| H A D | arm_neon_incl.td | 155 // rotl - Rotate set left by a number of elements. 158 // rotl - Rotate set right by a number of elements.
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| H A D | BuiltinsPPC.def | 119 // Rotate
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| /llvm-project-15.0.7/llvm/lib/Target/X86/ |
| H A D | X86InstrShiftRotate.td | 1 //===-- X86InstrShiftRotate.td - Shift and Rotate Instrs ---*- tablegen -*-===// 325 // Rotate instructions 489 // Rotate by 1 537 // Rotate by 1 587 // Rotate by 1 635 // Rotate by 1
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| H A D | X86ISelLowering.cpp | 15029 return Rotate; in lowerV2I64Shuffle() 16033 return Rotate; in lowerV8I16Shuffle() 16207 return Rotate; in lowerV16I8Shuffle() 17917 return Rotate; in lowerV4I64Shuffle() 18129 return Rotate; in lowerV8I32Shuffle() 18222 return Rotate; in lowerV16I16Shuffle() 18337 return Rotate; in lowerV32I8Shuffle() 18738 return Rotate; in lowerV8I64Shuffle() 18802 return Rotate; in lowerV16I32Shuffle() 18872 return Rotate; in lowerV32I16Shuffle() [all …]
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| /llvm-project-15.0.7/cross-project-tests/debuginfo-tests/dexter/ |
| H A D | README.md | 296 pass 31/211 = (0.8673) (0.1327) [Rotate Loops on loop]
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| /llvm-project-15.0.7/llvm/ |
| H A D | CREDITS.TXT | 397 D: LTO tool, PassManager rewrite, Loop Pass Manager, Loop Rotate
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| /llvm-project-15.0.7/llvm/include/llvm/Target/ |
| H A D | GenericOpcodes.td | 377 /// Rotate bits right. 384 /// Rotate bits left.
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| H A D | Target.td | 338 // (rotl GPR, 1) - Rotate N places to the left. 340 // (rotr GPR, 1) - Rotate N places to the right.
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| /llvm-project-15.0.7/llvm/test/MC/PowerPC/ |
| H A D | ppc64-encoding-vmx.s | 909 # Vector Rotate Left Mask/Mask-Insert
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| /llvm-project-15.0.7/llvm/docs/GlobalISel/ |
| H A D | GenericOpcode.rst | 323 Rotate the bits right (G_ROTR) or left (G_ROTL).
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| /llvm-project-15.0.7/llvm/lib/Target/PowerPC/ |
| H A D | README_P9.txt | 110 - Vector Rotate Left Mask/Mask-Insert: vrlwnm vrlwmi vrldnm vrldmi
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| /llvm-project-15.0.7/llvm/lib/Target/Mips/ |
| H A D | Mips64InstrInfo.td | 189 // Rotate Instructions
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