| /llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/ |
| H A D | agpr-copy-no-free-registers.ll | 68 ; GFX908-NEXT: v_accvgpr_read_b32 v34, a0 ; Reload Reuse 69 ; GFX908-NEXT: v_accvgpr_read_b32 v38, a11 ; Reload Reuse 70 ; GFX908-NEXT: v_accvgpr_read_b32 v37, a12 ; Reload Reuse 72 ; GFX908-NEXT: v_accvgpr_read_b32 v34, a1 ; Reload Reuse 76 ; GFX908-NEXT: v_accvgpr_read_b32 v34, a2 ; Reload Reuse 79 ; GFX908-NEXT: v_accvgpr_read_b32 v34, a3 ; Reload Reuse 82 ; GFX908-NEXT: v_accvgpr_read_b32 v34, a4 ; Reload Reuse 85 ; GFX908-NEXT: v_accvgpr_read_b32 v34, a5 ; Reload Reuse 88 ; GFX908-NEXT: v_accvgpr_read_b32 v34, a6 ; Reload Reuse 91 ; GFX908-NEXT: v_accvgpr_read_b32 v34, a7 ; Reload Reuse [all …]
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| H A D | agpr-csr.ll | 38 ; GFX90A: v_accvgpr_read_b32 v0, a32 ; Reload Reuse 42 ; GFX90A: v_accvgpr_write_b32 a32, v0 ; Reload Reuse 53 ; GFX90A: v_accvgpr_read_b32 v0, a63 ; Reload Reuse 55 ; GFX90A: v_accvgpr_write_b32 a63, v0 ; Reload Reuse 67 ; GFX90A: v_accvgpr_read_b32 v0, a63 ; Reload Reuse 69 ; GFX90A: v_accvgpr_write_b32 a63, v0 ; Reload Reuse
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| H A D | spill-agpr.ll | 77 ; GFX908-DAG: v_accvgpr_read_b32 v5, a0 ; Reload Reuse 79 ; GFX908-DAG: v_accvgpr_read_b32 v5, a1 ; Reload Reuse 81 ; GFX908-DAG: v_accvgpr_read_b32 v5, a2 ; Reload Reuse 83 ; GFX908-DAG: v_accvgpr_read_b32 v5, a3 ; Reload Reuse
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| H A D | break-smem-soft-clauses.mir | 65 # Reuse of same input pointer is OK
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| H A D | break-vmem-soft-clauses.mir | 70 # Reuse of same input pointer is OK
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| /llvm-project-15.0.7/llvm/test/DebugInfo/ |
| H A D | dwarfdump-macho-universal.test | 1 Reuse a test input from dsymutil, it's perfect for what we want to exercise
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| /llvm-project-15.0.7/llvm/test/CodeGen/AArch64/ |
| H A D | arm64-coalesce-ext.ll | 14 ; Reuse low bits of extended register, don't extend live range of SUM.
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| H A D | sibling-call.ll | 83 ; Reuse our area, putting "42" at incoming sp
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| /llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/ |
| H A D | coalesce-ext.ll | 14 ; Reuse low bits of extended register, don't extend live range of SUM.
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| /llvm-project-15.0.7/llvm/test/CodeGen/ARM/ |
| H A D | load-global2.ll | 39 ; No more pc-relative loads! Reuse r[[B]].
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| /llvm-project-15.0.7/lldb/docs/status/ |
| H A D | goals.rst | 29 * Reuse existing compiler technology where it makes sense
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| /llvm-project-15.0.7/llvm/test/CodeGen/X86/ |
| H A D | use-add-flags.ll | 5 ; Reuse the flags value from the add instructions instead of emitting separate
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| /llvm-project-15.0.7/llvm/test/tools/llvm-objcopy/ELF/ |
| H A D | add-symbol-no-symtab.test | 32 ## Reuse the existing .shstrtab (section names) for symbol names.
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| /llvm-project-15.0.7/mlir/include/mlir/Dialect/Linalg/TransformOps/ |
| H A D | LinalgTransformOps.td | 91 TODO: Reuse already fused OpResults instead of tiling/cloning a second time
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| /llvm-project-15.0.7/llvm/test/Transforms/SimplifyCFG/X86/ |
| H A D | switch_to_lookup_table.ll | 1327 ; Reuse the inverted table range compare. 1362 ; Reuse the table range compare.
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| /llvm-project-15.0.7/llvm/lib/Transforms/Vectorize/ |
| H A D | SLPVectorizer.cpp | 3690 bool Reuse = canReuseExtract(TE.Scalars, TE.getMainOp(), CurrentOrder); in getReorderingData() local 3691 if (Reuse || !CurrentOrder.empty()) { in getReorderingData() 4901 bool Reuse = canReuseExtract(VL, VL0, CurrentOrder); in buildTree_rec() local 4902 if (Reuse) { in buildTree_rec()
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| /llvm-project-15.0.7/llvm/test/Transforms/InstCombine/ |
| H A D | minmax-fold.ll | 155 ; Reuse the first 2 bitcasts as the select operands.
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| /llvm-project-15.0.7/llvm/lib/Target/ARM/ |
| H A D | ARMScheduleA9.td | 2367 // Reuse the load-multiple variants for store-multiple because the
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| /llvm-project-15.0.7/compiler-rt/lib/sanitizer_common/ |
| H A D | sanitizer_common_interceptors.inc | 7653 // Reuse the rest of the code in the strlcpy() interceptor
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