Searched refs:RegVal (Results 1 – 10 of 10) sorted by relevance
| /llvm-project-15.0.7/llvm/tools/llvm-exegesis/lib/ |
| H A D | SnippetFile.cpp | 51 RegisterValue RegVal; in HandleComment() local
61 if (!(RegVal.Register = findRegisterByName(Parts[0].trim()))) { in HandleComment()
68 RegVal.Value = APInt( in HandleComment()
70 Result->Key.RegisterInitialValues.push_back(std::move(RegVal)); in HandleComment()
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| /llvm-project-15.0.7/llvm/include/llvm/MC/ |
| H A D | MCInst.h | 49 unsigned RegVal; member
71 return RegVal; in getReg()
77 RegVal = Reg; in setReg()
137 Op.RegVal = Reg; in createReg()
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| /llvm-project-15.0.7/llvm/lib/Target/AVR/Disassembler/ |
| H A D | AVRDisassembler.cpp | 272 unsigned RegVal = GPRDecoderTable[(Insn >> 4) & 0x1f]; in decodeLoadStore() local
280 Inst.addOperand(MCOperand::createReg(RegVal)); in decodeLoadStore()
287 Inst.addOperand(MCOperand::createReg(RegVal)); in decodeLoadStore()
334 Inst.addOperand(MCOperand::createReg(RegVal)); in decodeLoadStore()
344 Inst.addOperand(MCOperand::createReg(RegVal)); in decodeLoadStore()
359 Inst.addOperand(MCOperand::createReg(RegVal)); in decodeLoadStore()
365 Inst.addOperand(MCOperand::createReg(RegVal)); in decodeLoadStore()
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| /llvm-project-15.0.7/lldb/unittests/tools/lldb-server/tests/ |
| H A D | MessageObjects.cpp | 367 const RegisterValue &RegVal) { in operator <<() argument
368 ArrayRef<uint8_t> Bytes(static_cast<const uint8_t *>(RegVal.GetBytes()), in operator <<()
369 RegVal.GetByteSize()); in operator <<()
370 return OS << formatv("RegisterValue[{0}]: {1:@[x-2]}", RegVal.GetByteSize(), in operator <<()
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| H A D | MessageObjects.h | 183 std::ostream &operator<<(std::ostream &OS, const RegisterValue &RegVal);
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| /llvm-project-15.0.7/llvm/include/llvm/MCA/ |
| H A D | Instruction.h | 52 unsigned RegVal; member
76 return RegVal; in getReg()
101 Op.RegVal = Reg; in createReg()
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| /llvm-project-15.0.7/llvm/unittests/Analysis/ |
| H A D | SparsePropagation.cpp | 206 auto RegVal = TestLatticeKey(I.getValueOperand(), IPOGrouping::Register); in visitStore() local
209 MergeValues(SS.getValueState(RegVal), SS.getValueState(MemPtr)); in visitStore()
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| /llvm-project-15.0.7/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUTargetMachine.cpp | 1479 auto parseRegister = [&](const yaml::StringValue &RegName, Register &RegVal) { in parseMachineFunctionInfo() argument
1485 RegVal = TempReg; in parseMachineFunctionInfo()
1491 Register &RegVal) { in parseMachineFunctionInfo() argument
1492 return !RegName.Value.empty() && parseRegister(RegName, RegVal); in parseMachineFunctionInfo()
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| /llvm-project-15.0.7/llvm/lib/Target/M68k/ |
| H A D | M68kISelLowering.cpp | 988 SDValue RegVal = DAG.getCopyFromReg(Chain, DL, F.VReg, F.VT); in LowerFormalArguments() local
990 Chain = DAG.getCopyToReg(Chain, DL, F.VReg, RegVal); in LowerFormalArguments()
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| /llvm-project-15.0.7/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 3997 SDValue RegVal = DAG.getCopyFromReg(Chain, DL, FR.VReg, FR.VT); in forwardMustTailParameters() local
4000 Chain = DAG.getCopyToReg(Chain, DL, FR.VReg, RegVal); in forwardMustTailParameters()
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