Searched refs:RegRC (Results 1 – 5 of 5) sorted by relevance
| /llvm-project-15.0.7/llvm/tools/llvm-reduce/deltas/ |
| H A D | ReduceInstructionsMIR.cpp | 100 const auto &RegRC = MRI->getRegClassOrRegBank(Reg); in extractInstrFromFunction() local
112 NewReg = getPrevDefOfRCInMBB(*BB, RI, RegRC, RegTy, ToDelete); in extractInstrFromFunction()
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| /llvm-project-15.0.7/llvm/lib/Target/X86/ |
| H A D | X86InstructionSelector.cpp | 1591 const TargetRegisterClass *RegRC = getRegClass(RegTy, *RegRB); in selectDivRem() local
1592 if (!RBI.constrainGenericRegister(Op1Reg, *RegRC, MRI) || in selectDivRem()
1593 !RBI.constrainGenericRegister(Op2Reg, *RegRC, MRI) || in selectDivRem()
1594 !RBI.constrainGenericRegister(DstReg, *RegRC, MRI)) { in selectDivRem()
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| /llvm-project-15.0.7/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | InstrEmitter.cpp | 236 const TargetRegisterClass *RegRC = MRI->getRegClass(Reg); in CreateVirtualRegisters() local
237 if (RegRC == RC) { in CreateVirtualRegisters()
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| /llvm-project-15.0.7/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUInstructionSelector.cpp | 2581 const TargetRegisterClass &RegRC in selectG_PTRMASK() local
2605 Register HiReg = MRI->createVirtualRegister(&RegRC); in selectG_PTRMASK()
2606 Register LoReg = MRI->createVirtualRegister(&RegRC); in selectG_PTRMASK()
2621 Register MaskLo = MRI->createVirtualRegister(&RegRC); in selectG_PTRMASK()
2622 MaskedLo = MRI->createVirtualRegister(&RegRC); in selectG_PTRMASK()
2635 Register MaskHi = MRI->createVirtualRegister(&RegRC); in selectG_PTRMASK()
2636 MaskedHi = MRI->createVirtualRegister(&RegRC); in selectG_PTRMASK()
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| H A D | SIInstrInfo.cpp | 7302 const TargetRegisterClass *RegRC = MRI.getRegClass(Reg); in findUsedSGPR() local
7303 if (RI.isSGPRClass(RegRC)) in findUsedSGPR()
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