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Searched refs:ReduceOp (Results 1 – 13 of 13) sorted by relevance

/llvm-project-15.0.7/mlir/lib/Dialect/Shape/Transforms/
H A DShapeToShapeLowering.cpp41 ReduceOp reduce = rewriter.create<ReduceOp>(loc, op.getShape(), init); in matchAndRewrite()
/llvm-project-15.0.7/mlir/lib/Conversion/SCFToOpenMP/
H A DSCFToOpenMP.cpp182 scf::ReduceOp reduce, in createDecl()
213 scf::ReduceOp reduce) { in addAtomicRMW()
237 scf::ReduceOp reduce) { in declareReduction()
341 for (auto reduce : parallelOp.getOps<scf::ReduceOp>()) { in matchAndRewrite()
371 llvm::zip(parallelOp.getOps<scf::ReduceOp>(), reductionVariables)) { in matchAndRewrite()
373 scf::ReduceOp reduceOp = std::get<0>(pair); in matchAndRewrite()
435 target.addIllegalOp<scf::ReduceOp, scf::ReduceReturnOp, scf::ParallelOp>(); in applyPatterns()
/llvm-project-15.0.7/mlir/test/Dialect/Shape/
H A Dinvalid.mlir4 // expected-error@+1 {{ReduceOp body is expected to have 3 arguments}}
15 // expected-error@+1 {{argument 0 of ReduceOp body is expected to be of IndexType}}
28 …// expected-error@+1 {{argument 1 of ReduceOp body is expected to be of SizeType if the ReduceOp o…
39 …// expected-error@+1 {{argument 1 of ReduceOp body is expected to be of IndexType if the ReduceOp
50 // expected-error@+1 {{type mismatch between argument 2 of ReduceOp body and initial value 0}}
/llvm-project-15.0.7/mlir/lib/Dialect/SparseTensor/IR/
H A DSparseTensorDialect.cpp360 LogicalResult ReduceOp::verify() { in verify()
380 isa<ReduceOp>(parentOp)) in verify()
/llvm-project-15.0.7/mlir/lib/Conversion/ShapeToStandard/
H A DShapeToStandard.cpp382 struct ReduceOpConverter : public OpConversionPattern<shape::ReduceOp> {
387 matchAndRewrite(shape::ReduceOp op, OpAdaptor adaptor,
393 ReduceOpConverter::matchAndRewrite(shape::ReduceOp op, OpAdaptor adaptor, in matchAndRewrite()
/llvm-project-15.0.7/mlir/lib/Dialect/SCF/IR/
H A DSCF.cpp2186 SmallVector<ReduceOp, 4> reductions(body->getOps<ReduceOp>()); in verify()
2352 auto reduce = dyn_cast<ReduceOp>(bodyOp); in matchAndRewrite()
2471 void ReduceOp::build( in build()
2486 LogicalResult ReduceOp::verifyRegions() { in verifyRegions()
2507 ParseResult ReduceOp::parse(OpAsmParser &parser, OperationState &result) { in parse()
2528 void ReduceOp::print(OpAsmPrinter &p) { in print()
2541 auto reduceOp = cast<ReduceOp>((*this)->getParentOp()); in verify()
/llvm-project-15.0.7/mlir/lib/Dialect/Shape/IR/
H A DShape.cpp1764 void ReduceOp::build(OpBuilder &builder, OperationState &result, Value shape, in build()
1787 LogicalResult ReduceOp::verify() { in verify()
1826 ParseResult ReduceOp::parse(OpAsmParser &parser, OperationState &result) { in parse()
1856 void ReduceOp::print(OpAsmPrinter &p) { in print()
/llvm-project-15.0.7/mlir/lib/Conversion/SCFToControlFlow/
H A DSCFToControlFlow.cpp490 auto reduce = dyn_cast<ReduceOp>(op); in matchAndRewrite()
/llvm-project-15.0.7/mlir/lib/Conversion/AffineToStandard/
H A DAffineToStandard.cpp249 auto reduceOp = rewriter.create<scf::ReduceOp>( in matchAndRewrite()
/llvm-project-15.0.7/mlir/include/mlir/Dialect/SCF/IR/
H A DSCFOps.td693 // ReduceOp
696 def ReduceOp : SCF_Op<"reduce", [HasParent<"ParallelOp">]> {
751 SCF_Op<"reduce.return", [HasParent<"ReduceOp">, NoSideEffect,
/llvm-project-15.0.7/mlir/test/Dialect/SCF/
H A Dinvalid.mlir307 // expected-error@+1 {{needs to have type 'f32' (the type of the enclosing ReduceOp)}}
/llvm-project-15.0.7/mlir/include/mlir/Dialect/Shape/IR/
H A DShapeOps.td694 [HasParent<"ReduceOp, FunctionLibraryOp">,
/llvm-project-15.0.7/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.cpp21418 SDValue AArch64TargetLowering::LowerPredReductionToSVE(SDValue ReduceOp, in LowerPredReductionToSVE() argument
21420 SDLoc DL(ReduceOp); in LowerPredReductionToSVE()
21421 SDValue Op = ReduceOp.getOperand(0); in LowerPredReductionToSVE()
21423 EVT VT = ReduceOp.getValueType(); in LowerPredReductionToSVE()
21430 switch (ReduceOp.getOpcode()) { in LowerPredReductionToSVE()