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Searched refs:Rdm (Results 1 – 2 of 2) sorted by relevance

/llvm-project-15.0.7/llvm/lib/Target/ARM/
H A DARMInstrThumb.td1254 def :tInstAlias<"mul${s}${p} $Rdm, $Rn", (tMUL tGPR:$Rdm, s_cc_out:$s, tGPR:$Rn,
1764 def : tInstAlias<"lsl${s}${p} $Rdm, $imm",
1765 (tLSLri tGPR:$Rdm, cc_out:$s, tGPR:$Rdm, imm0_31:$imm, pred:$p)>;
1766 def : tInstAlias<"lsr${s}${p} $Rdm, $imm",
1767 (tLSRri tGPR:$Rdm, cc_out:$s, tGPR:$Rdm, imm_sr:$imm, pred:$p)>;
1768 def : tInstAlias<"asr${s}${p} $Rdm, $imm",
1769 (tASRri tGPR:$Rdm, cc_out:$s, tGPR:$Rdm, imm_sr:$imm, pred:$p)>;
/llvm-project-15.0.7/llvm/lib/Target/ARM/Disassembler/
H A DARMDisassembler.cpp4703 unsigned Rdm = fieldFromInstruction(Insn, 0, 3); in DecodeThumbAddSPReg() local
4704 Rdm |= fieldFromInstruction(Insn, 7, 1) << 3; in DecodeThumbAddSPReg()
4706 if (!Check(S, DecodeGPRRegisterClass(Inst, Rdm, Address, Decoder))) in DecodeThumbAddSPReg()
4709 if (!Check(S, DecodeGPRRegisterClass(Inst, Rdm, Address, Decoder))) in DecodeThumbAddSPReg()