Searched refs:Rdd (Results 1 – 5 of 5) sorted by relevance
| /llvm-project-15.0.7/llvm/lib/Target/Hexagon/ |
| H A D | HexagonIntrinsicsV5.td | 24 //Rdd=vrmpyweh(Rss,Rtt)[:<<1] 28 //Rdd=vrmpywoh(Rss,Rtt)[:<<1] 32 //Rdd+=vrmpyweh(Rss,Rtt)[:<<1] 36 //Rdd=vrmpywoh(Rss,Rtt)[:<<1] 41 // Rdd=vmpyhsu(Rs,Rt)[:<<1]:sat 50 // Rdd=vpmpyh(Rs,Rt) 56 // Rdd=pmpyw(Rs,Rt) 154 // Rdd=vcnegh(Rss,Rt) 315 //Rdd[+]=vrmpybsu(Rss,Rtt) 316 //Rdd[+]=vrmpybuu(Rss,Rtt) [all …]
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| H A D | HexagonAsmPrinter.cpp | 518 MCOperand &Rdd = MappedInst.getOperand(0); in HexagonProcessInstruction() local 522 TmpInst.addOperand(Rdd); in HexagonProcessInstruction()
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| H A D | HexagonPatterns.td | 3198 // Generate code of the form 'C2_muxii(cmpbgtui(Rdd, C-1),0,1)'
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| /llvm-project-15.0.7/llvm/test/CodeGen/Hexagon/ |
| H A D | mapped_intrinsics.ll | 9 ; if (#u6 == 0) Assembler mapped to: Rdd = combine(Rss.H32,Rss.L32) 10 ; else Rdd = asr(Rss,#u6-1):rnd 12 ; if (#u4 == 0) Assembler mapped to: Rdd = combine(Rss.H32,Rss.L32) 13 ; else Rdd = vasrh(Rss,#u4-1):raw
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| /llvm-project-15.0.7/llvm/lib/Target/Hexagon/AsmParser/ |
| H A D | HexagonAsmParser.cpp | 1228 TmpInst.addOperand(Rdd); in makeCombineInst() 1548 MCOperand &Rdd = Inst.getOperand(0); in processInstruction() local 1554 Inst = makeCombineInst(Hexagon::A2_combineii, Rdd, imm, MO); in processInstruction() 1560 MCOperand &Rdd = Inst.getOperand(0); in processInstruction() local 1585 MCOperand &Rdd = Inst.getOperand(0); in processInstruction() local 1594 Inst = makeCombineInst(Hexagon::A2_combineii, Rdd, MO1, MO2); in processInstruction() 1600 MCOperand &Rdd = Inst.getOperand(0); in processInstruction() local 1736 MCOperand &Rdd = Inst.getOperand(0); in processInstruction() local 1753 TmpInst.addOperand(Rdd); in processInstruction() 1880 MCOperand &Rdd = Inst.getOperand(0); in processInstruction() local [all …]
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