Searched refs:RIV (Results 1 – 5 of 5) sorted by relevance
| /llvm-project-15.0.7/llvm/test/Transforms/LoopVectorize/ |
| H A D | dont-fold-tail-for-divisible-TC.ll | 36 ; CHECK-NEXT: [[RIV:%.*]] = phi i32 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[RIVPLUS1:%.*]], [[… 37 ; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[A]], i32 [[RIV]] 39 ; CHECK-NEXT: [[RIVPLUS1]] = add nuw nsw i32 [[RIV]], 1 102 ; CHECK-NEXT: [[RIV:%.*]] = phi i32 [ [[RIVPLUS1:%.*]], [[LOOP]] ], [ [[BC_RESUME_VAL]], [[SCALA… 103 ; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[A]], i32 [[RIV]] 105 ; CHECK-NEXT: [[RIVPLUS1]] = add nuw nsw i32 [[RIV]], 1 212 ; CHECK-NEXT: [[RIV:%.*]] = phi i32 [ [[RIVPLUS1:%.*]], [[LOOP]] ], [ [[BC_RESUME_VAL]], [[SCALA… 213 ; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[A]], i32 [[RIV]] 215 ; CHECK-NEXT: [[RIVPLUS1]] = add nuw nsw i32 [[RIV]], 1
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| H A D | dont-fold-tail-for-const-TC.ll | 42 ; CHECK-NEXT: [[RIV:%.*]] = phi i32 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[RIVPLUS1:%.*]], [[… 43 ; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[A]], i32 [[RIV]] 45 ; CHECK-NEXT: [[RIVPLUS1]] = add nuw nsw i32 [[RIV]], 1
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| H A D | pr45679-fold-tail-by-masking.ll | 65 ; CHECK-NEXT: [[RIV:%.*]] = phi i32 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[RIVPLUS1:%.*]], [[… 66 ; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[A]], i32 [[RIV]] 68 ; CHECK-NEXT: [[RIVPLUS1]] = add nuw nsw i32 [[RIV]], 1 127 ; VF2UF2-NEXT: [[RIV:%.*]] = phi i32 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[RIVPLUS1:%.*]], [… 128 ; VF2UF2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[A]], i32 [[RIV]] 130 ; VF2UF2-NEXT: [[RIVPLUS1]] = add nuw nsw i32 [[RIV]], 1 188 ; VF1UF4-NEXT: [[RIV:%.*]] = phi i32 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[RIVPLUS1:%.*]], [… 189 ; VF1UF4-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[A]], i32 [[RIV]] 191 ; VF1UF4-NEXT: [[RIVPLUS1]] = add nuw nsw i32 [[RIV]], 1
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| /llvm-project-15.0.7/llvm/tools/llvm-exegesis/lib/ |
| H A D | SnippetGenerator.cpp | 107 std::vector<RegisterValue> RIV; in computeRegisterInitialValues() local 125 RIV.push_back(RegisterValue::zero(Reg)); in computeRegisterInitialValues() 139 return RIV; in computeRegisterInitialValues()
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| /llvm-project-15.0.7/llvm/unittests/tools/llvm-exegesis/X86/ |
| H A D | SnippetGeneratorTest.cpp | 432 const auto RIV = Generator.computeRegisterInitialValues(Snippet); in TEST_F() local 433 EXPECT_THAT(RIV, ElementsAre(IsRegisterValue(X86::AX, APInt()))); in TEST_F() 458 const auto RIV = Generator.computeRegisterInitialValues(Snippet); in TEST_F() local 459 EXPECT_THAT(RIV, ElementsAre(IsRegisterValue(X86::RBX, APInt()))); in TEST_F()
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