| /llvm-project-15.0.7/llvm/test/MC/X86/ |
| H A D | intel-syntax-error.s | 30 lea RDX, [unknown_number * RAX + RBX + _foo] 32 lea RDX, [4 * RAX + 27 * RBX + _pat]
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| H A D | intel-syntax.s | 17 lea RDX, [8 * RAX + RBX + _foo] 19 lea RDX, [_foo + 8 * RAX + RBX] 27 lea RDX, [_foo + RAX * 8 + RBX] 39 lea RDX, [RAX * number + RBX + _foo] 41 lea RDX, [_foo + RAX * number + RBX] 47 lea RDX, [number * RAX + RBX + _foo] 49 lea RDX, [_foo + number * RAX + RBX]
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| /llvm-project-15.0.7/llvm/test/tools/llvm-objdump/COFF/ |
| H A D | win64-unwind-data.test | 16 OBJ-NEXT: Frame register: RBX 20 OBJ-NEXT: 0x0f: UOP_PushNonVol RBX 65 EXE-NEXT: Frame register: RBX 69 EXE-NEXT: 0x0f: UOP_PushNonVol RBX
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| /llvm-project-15.0.7/bolt/lib/Passes/ |
| H A D | RegReAssign.cpp | 334 MCPhysReg RBX = 0; in conservativePassOverFunction() local 341 RBX = I; in conservativePassOverFunction() 344 if (!RBX) in conservativePassOverFunction() 347 LLVM_DEBUG(dbgs() << "\n ** Swapping " << BC.MRI->getName(RBX) << " with " in conservativePassOverFunction() 350 swap(Function, RBX, Candidate); in conservativePassOverFunction()
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| /llvm-project-15.0.7/llvm/test/tools/llvm-dwarfdump/X86/ |
| H A D | debug_loclists.s | 19 # BOTH-NEXT: <default>: DW_OP_reg3 RBX 41 # REGULAR-NEXT: <default>: DW_OP_reg3 RBX 43 # VERBOSE-NEXT: => <default>: DW_OP_reg3 RBX
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| /llvm-project-15.0.7/llvm/test/DebugInfo/MIR/X86/ |
| H A D | debug-call-site-param.mir | 31 # CHECK-GNU-NEXT: DW_AT_GNU_call_site_value (DW_OP_breg3 RBX+0) 37 # CHECK-GNU-NEXT: DW_AT_GNU_call_site_value (DW_OP_breg15 R15+0, DW_OP_breg3 RBX+0, DW_OP_pl… 57 # CHECK-DWARF5-NEXT: DW_AT_call_value (DW_OP_breg3 RBX+0) 63 # CHECK-DWARF5-NEXT: DW_AT_call_value (DW_OP_breg15 R15+0, DW_OP_breg3 RBX+0, DW_OP_plus)
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| H A D | dbgcall-site-two-fwd-reg-defs.mir | 137 # CHECK-NEXT: DW_AT_call_value (DW_OP_breg3 RBX+0, DW_OP_constu 0xffffffff, DW_OP_and, DW_OP_con… 141 # CHECK-NEXT: DW_AT_call_value (DW_OP_breg3 RBX+0)
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| H A D | dbgcall-site-copy-super-sub.mir | 118 # CHECK-NEXT: DW_AT_GNU_call_site_value (DW_OP_breg3 RBX+0)
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| /llvm-project-15.0.7/llvm/test/tools/llvm-exegesis/X86/ |
| H A D | analysis-clustering-algorithms.test | 193 - 'ROL64ri RBX RBX i_0x1' 210 - 'RBX=0x0'
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| /llvm-project-15.0.7/lld/test/COFF/ |
| H A D | unwind.test | 29 # UNWIND: Frame register: RBX 33 # UNWIND: 0x0f: UOP_PushNonVol RBX
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| /llvm-project-15.0.7/llvm/lib/Target/X86/MCTargetDesc/ |
| H A D | X86MCTargetDesc.cpp | 256 {codeview::RegisterId::RBX, X86::RBX}, in initLLVMToSEHAndCVRegMapping() 763 case X86::BH: case X86::BL: case X86::BX: case X86::EBX: case X86::RBX: in getX86SubSuperRegisterOrZero() 775 case X86::BH: case X86::BL: case X86::BX: case X86::EBX: case X86::RBX: in getX86SubSuperRegisterOrZero() 812 case X86::BH: case X86::BL: case X86::BX: case X86::EBX: case X86::RBX: in getX86SubSuperRegisterOrZero() 848 case X86::BH: case X86::BL: case X86::BX: case X86::EBX: case X86::RBX: in getX86SubSuperRegisterOrZero() 884 case X86::BH: case X86::BL: case X86::BX: case X86::EBX: case X86::RBX: in getX86SubSuperRegisterOrZero() 885 return X86::RBX; in getX86SubSuperRegisterOrZero()
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| /llvm-project-15.0.7/llvm/lib/Target/X86/ |
| H A D | X86CallingConv.td | 439 CCIfType<[i64], CCAssignToReg<[RBX, RBP, RDI, RSI, RDX, RCX, R8, R9, 609 CCIfType<[i64], CCAssignToReg<[RBX, R12, RBP, R15, 710 CCAssignToReg<[R13, RBP, R12, RBX, R14, RSI, RDI, R8, R9, R15]>>, 1129 def CSR_64 : CalleeSavedRegs<(add RBX, R12, R13, R14, R15, RBP)>; 1137 def CSR_Win64_NoSSE : CalleeSavedRegs<(add RBX, RBP, RDI, RSI, R12, R13, R14, R15)>; 1167 def CSR_64_MostRegs : CalleeSavedRegs<(add RBX, RCX, RDX, RSI, RDI, R8, R9, R10, 1193 def CSR_Win64_Intel_OCL_BI_AVX : CalleeSavedRegs<(add RBX, RBP, RDI, RSI, R12, 1197 def CSR_Win64_Intel_OCL_BI_AVX512 : CalleeSavedRegs<(add RBX, RBP, RDI, RSI, 1209 def CSR_64_Intel_OCL_BI_AVX512 : CalleeSavedRegs<(add RBX, RSI, R14, R15, 1222 def CSR_Win64_RegCall_NoSSE : CalleeSavedRegs<(add RBX, RBP, [all …]
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| H A D | X86RegisterInfo.td | 172 def RBX : X86Reg<"rbx", 3, [EBX]>, DwarfRegNum<[3, -2, -2]>; 385 // List call-clobbered registers before callee-save registers. RBX, RBP, (and 431 RBX, R14, R15, R12, R13, RBP, RSP, RIP)>; 437 RBX, R14, R15, R12, R13, RBP)>; 460 def GR64_ABCD : RegisterClass<"X86", [i64], 64, (add RAX, RCX, RDX, RBX)>; 484 (add RAX, RCX, RDX, RSI, RDI, RBX, RBP, RSP, RIP)>;
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| H A D | X86ExpandPseudo.cpp | 436 TII->copyPhysReg(MBB, MBBI, DL, X86::RBX, InArg.getReg(), false); in ExpandMI() 443 TII->copyPhysReg(MBB, MBBI, DL, X86::RBX, SaveRbx, in ExpandMI() 541 TII->copyPhysReg(MBB, MBBI, DL, X86::RBX, SaveRbx, /*SrcIsKill*/ true); in ExpandMI()
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| H A D | X86InstrSystem.td | 592 let Defs = [RSI, RDI], Uses = [RBX, RDX, RSI, RDI] in { 683 let Uses = [RAX, RBX, RCX, RDX], Defs = [RAX, RBX, RCX] in { 753 // RBX/RCX/RDX: Leaf-specific purpose." 760 let Uses = [RAX, RBX, RCX, RDX], Defs = [RAX, RBX, RCX, RDX, EFLAGS] in
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| /llvm-project-15.0.7/llvm/test/tools/llvm-dwp/X86/ |
| H A D | loclists.s | 15 # CHECK-NEXT: DW_LLE_offset_pair (0x0000000000000004, 0x0000000000000008): DW_OP_reg3 RBX
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| /llvm-project-15.0.7/llvm/test/DebugInfo/X86/ |
| H A D | location-range-inlined-xblock.mir | 27 ## Check that the location for inlined variable 'local' (RBX), which spans 30 # CHECK: DW_AT_location [DW_FORM_exprloc] (DW_OP_reg3 RBX)
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| H A D | live-debug-variables.ll | 30 ; CHECK-NEXT: DW_AT_location (DW_OP_reg3 RBX)
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| /llvm-project-15.0.7/llvm/lib/Target/X86/Disassembler/ |
| H A D | X86DisassemblerDecoder.h | 173 ENTRY(RBX) \ 191 ENTRY(RBX) \
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| /llvm-project-15.0.7/llvm/unittests/tools/llvm-exegesis/X86/ |
| H A D | SnippetGeneratorTest.cpp | 454 MCOperand::createReg(X86::RBX); in TEST_F() 459 EXPECT_THAT(RIV, ElementsAre(IsRegisterValue(X86::RBX, APInt()))); in TEST_F()
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| /llvm-project-15.0.7/bolt/test/X86/ |
| H A D | shrinkwrapping-do-not-pessimize.s | 42 # first uses of R14 and RBX appear at this point, possible move point for SW
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| /llvm-project-15.0.7/lldb/test/Shell/SymbolFile/DWARF/x86/ |
| H A D | unused-inlined-params.test | 28 …int", valid ranges = <block>, location = [0x0000000000000014, 0x000000000000001e) -> DW_OP_reg3 RBX
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| /llvm-project-15.0.7/compiler-rt/lib/asan/ |
| H A D | asan_rtl_x86_64.S | 131 ASAN_MEMORY_ACCESS_CALLBACKS_ADD(RBX)
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| /llvm-project-15.0.7/lldb/test/Shell/SymbolFile/NativePDB/ |
| H A D | local-variables-registers.s | 51 …type = "char **", valid ranges = [0x0000000140001011-0x0000000140001019), location = DW_OP_reg3 RBX 55 …type = "char **", valid ranges = [0x0000000140001011-0x0000000140001019), location = DW_OP_reg3 RBX
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| /llvm-project-15.0.7/llvm/test/CodeGen/X86/ |
| H A D | dbg-baseptr.ll | 57 ; in RBX.
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