Home
last modified time | relevance | path

Searched refs:Pu (Results 1 – 6 of 6) sorted by relevance

/llvm-project-15.0.7/llvm/lib/Target/Hexagon/
H A DHexagonPatterns.td103 def pnot: PatFrag<(ops node:$Pu), (xor node:$Pu, ptrue)>;
503 def: Pat<(i32 (azext I1:$Pu)), (C2_muxii I1:$Pu, 1, 0)>;
504 def: Pat<(i64 (azext I1:$Pu)), (ToZext64 (C2_muxii I1:$Pu, 1, 0))>;
505 def: Pat<(i32 (sext I1:$Pu)), (C2_muxii I1:$Pu, -1, 0)>;
506 def: Pat<(i64 (sext I1:$Pu)), (Combinew (C2_muxii PredRegs:$Pu, -1, 0),
509 def: Pat<(v2i16 (sext V2I1:$Pu)), (S2_vtrunehb (C2_mask V2I1:$Pu))>;
510 def: Pat<(v2i32 (sext V2I1:$Pu)), (C2_mask V2I1:$Pu)>;
511 def: Pat<(v4i8 (sext V4I1:$Pu)), (S2_vtrunehb (C2_mask V4I1:$Pu))>;
512 def: Pat<(v4i16 (sext V4I1:$Pu)), (C2_mask V4I1:$Pu)>;
513 def: Pat<(v8i8 (sext V8I1:$Pu)), (C2_mask V8I1:$Pu)>;
[all …]
H A DHexagonPseudo.td212 bits<2> Pu;
226 bits<2> Pu;
236 //def PS_call_nrt: Call_nr<17, 1, 0, (ins PredRegs:$Pu, s32_0Imm:$dst),
238 //def PS_call_nrf: Call_nr<17, 1, 1, (ins PredRegs:$Pu, s32_0Imm:$dst),
355 (ins PredRegs:$Pu, DoubleRegs:$Rs, DoubleRegs:$Rt),
H A DHexagonPatternsHVX.td727 : Pat<(select I1:$Pu, RegPred:$Vs, RegPred:$Vt),
728 (MI I1:$Pu, RegPred:$Vs, RegPred:$Vt)>;
742 def: Pat<(select I1:$Pu, VecQ8:$Qs, VecQ8:$Qt),
743 (V2Q (PS_vselect $Pu, (Q2V $Qs), (Q2V $Qt)))>;
744 def: Pat<(select I1:$Pu, VecQ16:$Qs, VecQ16:$Qt),
745 (V2Q (PS_vselect $Pu, (Q2V $Qs), (Q2V $Qt)))>;
746 def: Pat<(select I1:$Pu, VecQ32:$Qs, VecQ32:$Qt),
747 (V2Q (PS_vselect $Pu, (Q2V $Qs), (Q2V $Qt)))>;
H A DHexagonISelDAGToDAG.cpp808 SDNode *Pu = CurDAG->getMachineNode(Hexagon::C2_tfrrp, dl, MVT::v8i1, in SelectVAlign() local
812 SDValue(Pu,0)); in SelectVAlign()
H A DHexagonInstrInfo.cpp1338 Register Pu = Op1.getReg(); in expandPostRAPseudo() local
1347 .addReg(Pu, (Rd == Rt) ? K1 : 0) in expandPostRAPseudo()
1351 .addReg(Pu, K1) in expandPostRAPseudo()
/llvm-project-15.0.7/llvm/test/CodeGen/Hexagon/
H A Dalu64.ll157 define i64 @test40(i32 %Pu, i64 %Rs, i64 %Rt) #0 {
159 %0 = tail call i64 @llvm.hexagon.C2.vmux(i32 %Pu, i64 %Rs, i64 %Rt)