Home
last modified time | relevance | path

Searched refs:Proc (Results 1 – 25 of 51) sorted by relevance

123

/llvm-project-15.0.7/llvm/lib/Target/Sparc/
H A DSparc.td90 def : Proc<"generic", []>;
92 def : Proc<"v8", []>;
93 def : Proc<"supersparc", []>;
94 def : Proc<"sparclite", []>;
95 def : Proc<"f934", []>;
96 def : Proc<"hypersparc", []>;
97 def : Proc<"sparclite86x", []>;
98 def : Proc<"sparclet", []>;
99 def : Proc<"tsc701", []>;
100 def : Proc<"myriad2", [FeatureLeon, LeonCASA]>;
[all …]
/llvm-project-15.0.7/llvm/lib/Target/NVPTX/
H A DNVPTX.td106 def : Proc<"sm_20", [SM20]>;
107 def : Proc<"sm_21", [SM21]>;
108 def : Proc<"sm_30", [SM30]>;
109 def : Proc<"sm_32", [SM32, PTX40]>;
110 def : Proc<"sm_35", [SM35]>;
111 def : Proc<"sm_37", [SM37, PTX41]>;
112 def : Proc<"sm_50", [SM50, PTX40]>;
113 def : Proc<"sm_52", [SM52, PTX41]>;
114 def : Proc<"sm_53", [SM53, PTX42]>;
115 def : Proc<"sm_60", [SM60, PTX50]>;
[all …]
/llvm-project-15.0.7/llvm/test/tools/llvm-readobj/ELF/
H A Dmips-options-sec.test12 # CHECK-NEXT: Co-Proc Mask0: 0x88776655
13 # CHECK-NEXT: Co-Proc Mask1: 0xCCBBAA99
14 # CHECK-NEXT: Co-Proc Mask2: 0x1EFFEEDD
20 # CHECK-NEXT: Co-Proc Mask0: 0x0
21 # CHECK-NEXT: Co-Proc Mask1: 0x0
22 # CHECK-NEXT: Co-Proc Mask2: 0x0
23 # CHECK-NEXT: Co-Proc Mask3: 0x0
133 # KIND-NEXT: Co-Proc Mask0: 0x0
134 # KIND-NEXT: Co-Proc Mask1: 0x0
135 # KIND-NEXT: Co-Proc Mask2: 0x0
[all …]
H A Dmips-reginfo.test10 # OPTIONS-NEXT: Co-Proc Mask0: 0x88776655
11 # OPTIONS-NEXT: Co-Proc Mask1: 0xCCBBAA99
12 # OPTIONS-NEXT: Co-Proc Mask2: 0x1EFFEEDD
13 # OPTIONS-NEXT: Co-Proc Mask3: 0x5E4E3E2E
H A Dsymbol-types.test32 # LLVM: Type: Proc Specific (0xD)
34 # LLVM: Type: Proc Specific (0xE)
36 # LLVM: Type: Proc Specific (0xF)
/llvm-project-15.0.7/llvm/lib/Target/M68k/
H A DM68k.td65 class Proc<string Name, list<SubtargetFeature> Features>
68 def : Proc<"generic", [ FeatureISA00 ]>;
69 def : Proc<"M68000", [ FeatureISA00 ]>;
70 def : Proc<"M68010", [ FeatureISA10 ]>;
71 def : Proc<"M68020", [ FeatureISA20 ]>;
72 def : Proc<"M68030", [ FeatureISA30 ]>;
73 def : Proc<"M68040", [ FeatureISA40 ]>;
74 def : Proc<"M68060", [ FeatureISA60 ]>;
/llvm-project-15.0.7/llvm/lib/Target/BPF/
H A DBPF.td17 class Proc<string Name, list<SubtargetFeature> Features>
20 def : Proc<"generic", []>;
21 def : Proc<"v1", []>;
22 def : Proc<"v2", []>;
23 def : Proc<"v3", []>;
24 def : Proc<"probe", []>;
/llvm-project-15.0.7/llvm/lib/Target/Mips/
H A DMips.td239 def : Proc<"generic", [FeatureMips32]>;
240 def : Proc<"mips1", [FeatureMips1]>;
241 def : Proc<"mips2", [FeatureMips2]>;
242 def : Proc<"mips32", [FeatureMips32]>;
243 def : Proc<"mips32r2", [FeatureMips32r2]>;
244 def : Proc<"mips32r3", [FeatureMips32r3]>;
245 def : Proc<"mips32r5", [FeatureMips32r5]>;
248 def : Proc<"mips3", [FeatureMips3]>;
249 def : Proc<"mips4", [FeatureMips4]>;
250 def : Proc<"mips5", [FeatureMips5]>;
[all …]
/llvm-project-15.0.7/llvm/unittests/DebugInfo/CodeView/
H A DTypeHashingTest.cpp84 TypeIndex Proc[2]; in TEST() local
105 Proc[0] = createProcedureRecord(Ordering1, 2, IntPP[0], Args[0]); in TEST()
111 ASSERT_EQ(0x1004U, Proc[0].getIndex()); in TEST()
136 Proc[1] = createProcedureRecord(Ordering2, 2, IntPP[1], Args[1]); in TEST()
144 ASSERT_EQ(0x1005U, Proc[1].getIndex()); in TEST()
155 EXPECT_EQ(hash_of(Hashes1, Proc[0]), hash_of(Hashes2, Proc[1])); in TEST()
/llvm-project-15.0.7/llvm/lib/DebugInfo/PDB/Native/
H A DNativeTypeFunctionSig.cpp80 codeview::ProcedureRecord Proc) in NativeTypeFunctionSig() argument
82 Proc(std::move(Proc)), Index(Index), IsMemberFunction(false) {} in NativeTypeFunctionSig()
96 initializeArgList(Proc.ArgumentList); in initialize()
153 return IsMemberFunction ? MemberFunc.CallConv : Proc.CallConv; in getCallingConvention()
158 : Proc.getParameterCount(); in getCount()
163 IsMemberFunction ? MemberFunc.getReturnType() : Proc.getReturnType(); in getTypeId()
194 IsMemberFunction ? MemberFunc.getOptions() : Proc.getOptions(); in isCxxReturnUdt()
/llvm-project-15.0.7/lld/test/ELF/
H A Dmips-reginfo.s21 # CHECK-NEXT: Co-Proc Mask0: 0x0
22 # CHECK-NEXT: Co-Proc Mask1: 0x0
23 # CHECK-NEXT: Co-Proc Mask2: 0x0
24 # CHECK-NEXT: Co-Proc Mask3: 0x0
H A Dmips-options.s38 # CHECK-NEXT: Co-Proc Mask0: 0x0
39 # CHECK-NEXT: Co-Proc Mask1: 0x0
40 # CHECK-NEXT: Co-Proc Mask2: 0x0
41 # CHECK-NEXT: Co-Proc Mask3: 0x0
/llvm-project-15.0.7/clang/lib/Basic/
H A DTargetID.cpp20 llvm::StringRef Proc) { in getAllPossibleAMDGPUTargetIDFeatures() argument
23 auto ProcKind = T.isAMDGCN() ? llvm::AMDGPU::parseArchAMDGCN(Proc) in getAllPossibleAMDGPUTargetIDFeatures()
24 : llvm::AMDGPU::parseArchR600(Proc); in getAllPossibleAMDGPUTargetIDFeatures()
152 llvm::StringRef Proc = *parseTargetIDWithFormatCheckingOnly(ID, &Features); in getConflictTargetIDCombination() local
153 auto Loc = FeatureMap.find(Proc); in getConflictTargetIDCombination()
155 FeatureMap[Proc] = Info{ID, Features}; in getConflictTargetIDCombination()
/llvm-project-15.0.7/llvm/lib/Target/MSP430/
H A DMSP430.td39 class Proc<string Name, list<SubtargetFeature> Features>
42 def : Proc<"generic", []>;
43 def : Proc<"msp430", []>;
44 def : Proc<"msp430x", [FeatureX]>;
/llvm-project-15.0.7/llvm/lib/DebugInfo/CodeView/
H A DSymbolRecordHelpers.cpp32 ProcSym Proc = createRecord<ProcSym>(Sym); in getScopeEndOffset() local
33 return Proc.End; in getScopeEndOffset()
63 ProcSym Proc = createRecord<ProcSym>(Sym); in getScopeParentOffset() local
64 return Proc.Parent; in getScopeParentOffset()
H A DSymbolRecordMapping.cpp410 error(IO.mapInteger(Proc.Parent)); in visitKnownRecord()
411 error(IO.mapInteger(Proc.End)); in visitKnownRecord()
412 error(IO.mapInteger(Proc.Next)); in visitKnownRecord()
413 error(IO.mapInteger(Proc.CodeSize)); in visitKnownRecord()
414 error(IO.mapInteger(Proc.DbgStart)); in visitKnownRecord()
415 error(IO.mapInteger(Proc.DbgEnd)); in visitKnownRecord()
416 error(IO.mapInteger(Proc.FunctionType)); in visitKnownRecord()
417 error(IO.mapInteger(Proc.CodeOffset)); in visitKnownRecord()
418 error(IO.mapInteger(Proc.Segment)); in visitKnownRecord()
419 error(IO.mapEnum(Proc.Flags)); in visitKnownRecord()
[all …]
H A DSymbolDumper.cpp565 W.printHex("PtrParent", Proc.Parent); in visitKnownRecord()
566 W.printHex("PtrEnd", Proc.End); in visitKnownRecord()
567 W.printHex("PtrNext", Proc.Next); in visitKnownRecord()
568 W.printHex("CodeSize", Proc.CodeSize); in visitKnownRecord()
569 W.printHex("DbgStart", Proc.DbgStart); in visitKnownRecord()
570 W.printHex("DbgEnd", Proc.DbgEnd); in visitKnownRecord()
571 printTypeIndex("FunctionType", Proc.FunctionType); in visitKnownRecord()
574 Proc.CodeOffset, &LinkageName); in visitKnownRecord()
576 W.printHex("Segment", Proc.Segment); in visitKnownRecord()
577 W.printFlags("Flags", static_cast<uint8_t>(Proc.Flags), in visitKnownRecord()
[all …]
/llvm-project-15.0.7/llvm/lib/Target/XCore/
H A DXCore.td33 class Proc<string Name, list<SubtargetFeature> Features>
36 def : Proc<"generic", []>;
37 def : Proc<"xs1b-generic", []>;
/llvm-project-15.0.7/llvm/lib/Target/Hexagon/
H A DHexagon.td390 def : Proc<"generic", HexagonModelV60,
395 def : Proc<"hexagonv5", HexagonModelV5,
400 def : Proc<"hexagonv55", HexagonModelV55,
405 def : Proc<"hexagonv60", HexagonModelV60,
410 def : Proc<"hexagonv62", HexagonModelV62,
415 def : Proc<"hexagonv65", HexagonModelV65,
420 def : Proc<"hexagonv66", HexagonModelV66,
425 def : Proc<"hexagonv67", HexagonModelV67,
430 def : Proc<"hexagonv68", HexagonModelV68,
436 def : Proc<"hexagonv69", HexagonModelV69,
[all …]
/llvm-project-15.0.7/llvm/lib/Target/ARC/
H A DARC.td29 class Proc<string Name, list<SubtargetFeature> Features>
32 def : Proc<"generic", []>;
/llvm-project-15.0.7/llvm/include/llvm/DebugInfo/PDB/Native/
H A DNativeTypeFunctionSig.h27 codeview::TypeIndex TI, codeview::ProcedureRecord Proc);
58 codeview::ProcedureRecord Proc; member
/llvm-project-15.0.7/llvm/lib/Target/SPIRV/
H A DSPIRV.td17 class Proc<string Name, list<SubtargetFeature> Features>
20 def : Proc<"generic", []>;
/llvm-project-15.0.7/llvm/tools/llvm-pdbutil/
H A DMinimalSymbolDumper.cpp828 Error MinimalSymbolDumper::visitKnownRecord(CVSymbol &CVR, ProcSym &Proc) { in visitKnownRecord() argument
829 P.format(" `{0}`", Proc.Name); in visitKnownRecord()
832 Proc.Parent, Proc.End, in visitKnownRecord()
833 formatSegmentOffset(Proc.Segment, Proc.CodeOffset), in visitKnownRecord()
834 Proc.CodeSize); in visitKnownRecord()
836 switch (Proc.getKind()) { in visitKnownRecord()
846 typeOrIdIndex(Proc.FunctionType, IsType), Proc.DbgStart, in visitKnownRecord()
847 Proc.DbgEnd, in visitKnownRecord()
848 formatProcSymFlags(P.getIndentLevel() + 9, Proc.Flags)); in visitKnownRecord()
/llvm-project-15.0.7/llvm/lib/Target/VE/
H A DVE.td46 class Proc<string Name, list<SubtargetFeature> Features>
49 def : Proc<"generic", []>;
/llvm-project-15.0.7/llvm/lib/Target/X86/
H A DX86.td1289 def : Proc<"i386", [FeatureX87],
1291 def : Proc<"i486", [FeatureX87],
1293 def : Proc<"i586", [FeatureX87, FeatureCX8],
1295 def : Proc<"pentium", [FeatureX87, FeatureCX8],
1311 def : Proc<P, [FeatureX87, FeatureCX8, FeatureMMX,
1339 def : Proc<"lakemont", [FeatureCX8],
1500 def : Proc<P, [FeatureX87, FeatureCX8, FeatureCMOV,
1521 def : Proc<P, ProcessorFeatures.BarcelonaFeatures,
1526 def : Proc<"btver1", ProcessorFeatures.BtVer1Features,
1539 def : Proc<"bdver3", ProcessorFeatures.BdVer3Features,
[all …]

123