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Searched refs:PrevOp (Results 1 – 4 of 4) sorted by relevance

/llvm-project-15.0.7/llvm/utils/TableGen/
H A DCompressInstEmitter.cpp641 StringRef PrevOp; in emitCompressInstEmitter() local
672 if (CurOp != PrevOp) { in emitCompressInstEmitter()
673 if (!PrevOp.empty()) in emitCompressInstEmitter()
674 CaseStream.indent(6) << "break;\n } // case " + PrevOp + "\n"; in emitCompressInstEmitter()
831 PrevOp = CurOp; in emitCompressInstEmitter()
H A DCodeGenDAGPatterns.cpp3022 auto PrevOp = ComplexPatternOperands.find(Child->getName()); in ParseTreePattern() local
3023 if (PrevOp != ComplexPatternOperands.end()) { in ParseTreePattern()
3024 if (PrevOp->getValue() != OperandId) in ParseTreePattern()
/llvm-project-15.0.7/llvm/lib/CodeGen/SelectionDAG/
H A DSelectionDAG.cpp11036 SDValue PrevOp; in matchBinOpReduction() local
11041 return PartialReduction(PrevOp, MaskEnd); in matchBinOpReduction()
11057 return PartialReduction(PrevOp, MaskEnd); in matchBinOpReduction()
11062 return PartialReduction(PrevOp, MaskEnd); in matchBinOpReduction()
11064 PrevOp = Op; in matchBinOpReduction()
/llvm-project-15.0.7/llvm/lib/Target/ARM/AsmParser/
H A DARMAsmParser.cpp4167 std::unique_ptr<ARMOperand> PrevOp( in tryParseShiftRegister() local
4169 if (!PrevOp->isReg()) in tryParseShiftRegister()
4170 return Error(PrevOp->getStartLoc(), "shift must be of a register"); in tryParseShiftRegister()
4171 int SrcReg = PrevOp->getReg(); in tryParseShiftRegister()