| /llvm-project-15.0.7/llvm/lib/Transforms/Scalar/ |
| H A D | LoopDataPrefetch.cpp | 234 struct Prefetch { struct
245 Prefetch(const SCEVAddRecExpr *L, Instruction *I) : LSCEVAddRec(L) { in Prefetch() function
325 SmallVector<Prefetch, 16> Prefetches; in runOnLoop()
370 Prefetches.push_back(Prefetch(LSCEVAddRec, MemI)); in runOnLoop()
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| /llvm-project-15.0.7/llvm/test/MC/AArch64/ |
| H A D | arm64-optional-hash.s | 23 ; Prefetch and memory
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| /llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/ |
| H A D | ppc64-icbt-pwr7.ll | 13 ; CHECK: Cannot select: {{0x[0-9,a-f]+|t[0-9]+}}: ch = Prefetch
|
| /llvm-project-15.0.7/llvm/test/CodeGen/AArch64/ |
| H A D | O3-pipeline.ll | 34 ; CHECK-NEXT: Loop Data Prefetch
35 ; CHECK-NEXT: Falkor HW Prefetch Fix
204 ; CHECK-NEXT: Falkor HW Prefetch Fix Late Phase
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| /llvm-project-15.0.7/llvm/lib/Target/RISCV/ |
| H A D | RISCV.td | 432 "'Zicbop' (Cache-Block Prefetch Instructions)">;
435 "'Zicbop' (Cache-Block Prefetch Instructions)">;
|
| /llvm-project-15.0.7/clang/include/clang/Basic/ |
| H A D | BuiltinsAArch64.def | 75 // Prefetch
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| H A D | BuiltinsARM.def | 189 // Prefetch
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| H A D | arm_sve.td | 100 // J: Prefetch type (sv_prfop)
670 // Prefetch (Scalar base)
676 // Prefetch (Scalar base, VL displacement)
682 // Prefetch (Vector bases)
688 // Prefetch (Scalar base, Vector offsets)
709 // Prefetch (Vector bases, scalar offset)
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| /llvm-project-15.0.7/llvm/lib/Target/AArch64/AsmParser/ |
| H A D | AArch64AsmParser.cpp | 483 struct PrefetchOp Prefetch; member
542 Prefetch = o.Prefetch; in AArch64Operand()
676 return Prefetch.Val; in getPrefetch()
706 return StringRef(Prefetch.Data, Prefetch.Length); in getPrefetchName()
2161 Op->Prefetch.Val = Val; in CreatePrefetch()
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| /llvm-project-15.0.7/clang/lib/Sema/ |
| H A D | OpenCLBuiltins.td | 949 …2.10, v2.0 s6.13.10: Async Copies from Global to Local Memory, Local to Global Memory, and Prefetch
950 …0 s5.1.7 and s6.1.7: Async Copies from Global to Local Memory, Local to Global Memory, and Prefetch
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| /llvm-project-15.0.7/mlir/lib/Conversion/MemRefToLLVM/ |
| H A D | MemRefToLLVM.cpp | 748 rewriter.replaceOpWithNewOp<LLVM::Prefetch>(prefetchOp, dataPtr, isWrite, in matchAndRewrite()
|
| /llvm-project-15.0.7/llvm/lib/Target/X86/ |
| H A D | X86.td | 139 "Prefetch with Intent to Write and T1 Hint">;
|
| /llvm-project-15.0.7/llvm/lib/Target/SystemZ/ |
| H A D | SystemZScheduleZ196.td | 543 // Prefetch
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| H A D | SystemZScheduleZEC12.td | 553 // Prefetch and execution hint
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| H A D | SystemZScheduleZ13.td | 581 // Prefetch and execution hint
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| H A D | SystemZScheduleZ16.td | 605 // Prefetch and execution hint
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| H A D | SystemZScheduleZ15.td | 605 // Prefetch and execution hint
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| H A D | SystemZScheduleZ14.td | 591 // Prefetch and execution hint
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| H A D | SystemZInstrInfo.td | 1693 // Prefetch and execution hint
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| /llvm-project-15.0.7/llvm/lib/Target/AArch64/ |
| H A D | AArch64SchedThunderX2T99.td | 849 // Prefetch
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| H A D | AArch64SchedThunderX3T110.td | 1017 // Prefetch
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| H A D | AArch64SchedNeoverseN2.td | 2261 // Prefetch
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| H A D | AArch64SystemOperands.td | 257 // SVE Prefetch instruction options.
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| /llvm-project-15.0.7/llvm/lib/Target/Sparc/ |
| H A D | SparcInstrInfo.td | 1712 // Section A.42 - Prefetch Data
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| /llvm-project-15.0.7/llvm/lib/Target/VE/ |
| H A D | VEInstrVec.td | 347 // Section 8.9.19 - PFCHV (Prefetch Vector)
|