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Searched refs:PredCost (Results 1 – 13 of 13) sorted by relevance

/llvm-project-15.0.7/llvm/lib/CodeGen/
H A DSelectOptimize.cpp140 Scaled64 PredCost; member
583 SelectCost = std::max(SelectCost, InstCostMap[SI].PredCost); in findProfitableSIGroupsInnerLoops()
776 if (LoopCost[0].NonPredCost > LoopCost[0].PredCost || in checkLoopHeuristics()
777 LoopCost[1].NonPredCost >= LoopCost[1].PredCost) { in checkLoopHeuristics()
784 Scaled64 Gain[2] = {LoopCost[0].PredCost - LoopCost[0].NonPredCost, in checkLoopHeuristics()
785 LoopCost[1].PredCost - LoopCost[1].NonPredCost}; in checkLoopHeuristics()
791 Gain[1] * Scaled64::get(GainRelativeThreshold) < LoopCost[1].PredCost) { in checkLoopHeuristics()
792 Scaled64 RelativeGain = Scaled64::get(100) * Gain[1] / LoopCost[1].PredCost; in checkLoopHeuristics()
808 (LoopCost[1].PredCost - LoopCost[0].PredCost); in checkLoopHeuristics()
860 IPredCost = std::max(IPredCost, InstCostMap[UI].PredCost); in computeLoopCosts()
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H A DTargetInstrInfo.cpp1152 unsigned *PredCost) const { in getInstrLatency()
/llvm-project-15.0.7/llvm/lib/Target/AMDGPU/
H A DR600InstrInfo.h209 unsigned *PredCost = nullptr) const override;
H A DR600InstrInfo.cpp985 unsigned *PredCost) const { in getInstrLatency()
986 if (PredCost) in getInstrLatency()
987 *PredCost = 2; in getInstrLatency()
H A DSIInstrInfo.h1168 unsigned *PredCost = nullptr) const override;
H A DSIInstrInfo.cpp8218 unsigned *PredCost) const { in getInstrLatency()
/llvm-project-15.0.7/llvm/lib/Target/Hexagon/
H A DHexagonInstrInfo.h281 unsigned *PredCost = nullptr) const override;
H A DHexagonInstrInfo.cpp1963 unsigned *PredCost) const { in getInstrLatency()
/llvm-project-15.0.7/llvm/lib/Target/PowerPC/
H A DPPCInstrInfo.h411 unsigned *PredCost = nullptr) const override;
H A DPPCInstrInfo.cpp138 unsigned *PredCost) const { in getInstrLatency()
140 return PPCGenInstrInfo::getInstrLatency(ItinData, MI, PredCost); in getInstrLatency()
/llvm-project-15.0.7/llvm/lib/Target/ARM/
H A DARMBaseInstrInfo.cpp2153 unsigned PredCost = (TCycles + FCycles + TExtra + FExtra) * ScalingUpFactor; in isProfitableToIfCvt() local
2171 PredCost -= 1 * ScalingUpFactor; in isProfitableToIfCvt()
2180 PredCost += ((TCycles + FCycles - 4) / 4) * ScalingUpFactor; in isProfitableToIfCvt()
2191 return PredCost <= UnpredCost; in isProfitableToIfCvt()
4731 unsigned *PredCost) const { in getInstrLatency()
4744 Latency += getInstrLatency(ItinData, *I, PredCost); in getInstrLatency()
4750 if (PredCost && (MCID.isCall() || (MCID.hasImplicitDefOfPhysReg(ARM::CPSR) && in getInstrLatency()
4754 *PredCost = 1; in getInstrLatency()
H A DARMBaseInstrInfo.h456 unsigned *PredCost = nullptr) const override;
/llvm-project-15.0.7/llvm/include/llvm/CodeGen/
H A DTargetInstrInfo.h1622 unsigned *PredCost = nullptr) const;