Searched refs:Pd (Results 1 – 8 of 8) sorted by relevance
| /llvm-project-15.0.7/llvm/test/CodeGen/AArch64/ |
| H A D | sve-pred-log.ll | 3 …le x 16 x i1> @vselect_16(<vscale x 16 x i1> %Pg, <vscale x 16 x i1> %Pn, <vscale x 16 x i1> %Pd) { 7 %res = select <vscale x 16 x i1> %Pg, <vscale x 16 x i1> %Pn, <vscale x 16 x i1> %Pd 11 …<vscale x 8 x i1> @vselect_8(<vscale x 8 x i1> %Pg, <vscale x 8 x i1> %Pn, <vscale x 8 x i1> %Pd) { 15 %res = select <vscale x 8 x i1> %Pg, <vscale x 8 x i1> %Pn, <vscale x 8 x i1> %Pd 19 …<vscale x 4 x i1> @vselect_4(<vscale x 4 x i1> %Pg, <vscale x 4 x i1> %Pn, <vscale x 4 x i1> %Pd) { 23 %res = select <vscale x 4 x i1> %Pg, <vscale x 4 x i1> %Pn, <vscale x 4 x i1> %Pd 31 %res = select <vscale x 2 x i1> %Pg, <vscale x 2 x i1> %Pn, <vscale x 2 x i1> %Pd 39 %res = select <vscale x 1 x i1> %Pg, <vscale x 1 x i1> %Pn, <vscale x 1 x i1> %Pd 51 define <vscale x 8 x i1> @and_8(<vscale x 8 x i1> %Pg, <vscale x 8 x i1> %Pn, <vscale x 8 x i1> %Pd… 59 define <vscale x 4 x i1> @and_4(<vscale x 4 x i1> %Pg, <vscale x 4 x i1> %Pn, <vscale x 4 x i1> %Pd… [all …]
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| /llvm-project-15.0.7/llvm/lib/Target/AArch64/ |
| H A D | AArch64SchedA64FX.td | 2370 // [24] "brka $Pd, $Pg/m, $Pn"; 2373 // [25] "brka $Pd, $Pg/z, $Pn"; 2379 // [27] "brkb $Pd, $Pg/m, $Pn"; 2382 // [28] "brkb $Pd, $Pg/z, $Pn"; 3308 // [337] "pfalse $Pd"; 3371 // [358] "punpkhi $Pd, $Pn"; 3374 // [359] "punpklo $Pd, $Pn"; 3380 // [361] "rdffr $Pd"; 3383 // [362] "rdffr $Pd, $Pg/z"; 3386 // [363] "rdffrs $Pd, $Pg/z"; [all …]
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| H A D | SVEInstrFormats.td | 301 bits<4> Pd; 627 asm, "\t$Pd", 630 bits<4> Pd; 1421 bits<4> Pd; 1653 bits<4> Pd; 4733 bits<4> Pd; 4822 bits<4> Pd; 4897 bits<4> Pd; 4962 bits<4> Pd; 5009 bits<4> Pd; [all …]
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| H A D | SMEInstrFormats.td | 1117 : I<(outs PPRAny:$Pd), (ins PPRAny:$Pn, ppr_ty:$Pm, 1119 asm, "\t$Pd, $Pn, $Pm[$Rv, $imm]", "", []>, 1124 bits<4> Pd; 1133 let Inst{3-0} = Pd;
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| H A D | AArch64SVEInstrInfo.td | 2090 def : InstAlias<"mov $Pd, $Pg/m, $Pn", 2091 (SEL_PPPP PPR8:$Pd, PPRAny:$Pg, PPR8:$Pn, PPR8:$Pd), 1>; 2092 def : InstAlias<"mov $Pd, $Pn", 2093 (ORR_PPzPP PPR8:$Pd, PPR8:$Pn, PPR8:$Pn, PPR8:$Pn), 1>; 2094 def : InstAlias<"mov $Pd, $Pg/z, $Pn", 2095 (AND_PPzPP PPR8:$Pd, PPRAny:$Pg, PPR8:$Pn, PPR8:$Pn), 1>; 2097 def : InstAlias<"movs $Pd, $Pn", 2098 (ORRS_PPzPP PPR8:$Pd, PPR8:$Pn, PPR8:$Pn, PPR8:$Pn), 1>; 2099 def : InstAlias<"movs $Pd, $Pg/z, $Pn", 2102 def : InstAlias<"not $Pd, $Pg/z, $Pn", [all …]
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| /llvm-project-15.0.7/llvm/test/tools/llvm-rc/ |
| H A D | tag-dialog.test | 44 ; DIALOG-NEXT: 0100: 00008150 64000000 3C000A00 10000000 |...Pd...<.......| 50 ; DIALOG-NEXT: 0160: 00008150 64002000 3C000A00 13000000 |...Pd. .<.......|
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| /llvm-project-15.0.7/llvm/lib/Target/Hexagon/AsmParser/ |
| H A D | HexagonAsmParser.cpp | 1380 MCOperand &Pd = Inst.getOperand(0); in processInstruction() local 1383 TmpInst.addOperand(Pd); in processInstruction()
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| /llvm-project-15.0.7/llvm/lib/Target/Hexagon/ |
| H A D | HexagonPatterns.td | 615 // Avoid negated comparisons, i.e. those of form "Pd = !cmp(...)".
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