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/llvm-project-15.0.7/llvm/lib/Target/Hexagon/
H A DHexagonDepMapAsm2Intrin.td14 def: Pat<(int_hexagon_A2_abs IntRegs:$src1),
16 def: Pat<(int_hexagon_A2_absp DoubleRegs:$src1),
18 def: Pat<(int_hexagon_A2_abssat IntRegs:$src1),
62 def: Pat<(int_hexagon_A2_aslh IntRegs:$src1),
1792 def: Pat<(int_hexagon_Y6_dmpause ),
1794 def: Pat<(int_hexagon_Y6_dmpoll ),
1800 def: Pat<(int_hexagon_Y6_dmwait ),
2137 def: Pat<(int_hexagon_V6_vd0 ),
2139 def: Pat<(int_hexagon_V6_vd0_128B ),
3251 def: Pat<(int_hexagon_V6_vdd0 ),
[all …]
H A DHexagonPatternsHVX.td126 def: Pat<(ResType (Load I32:$Rt)),
200 def: Pat<(Store Value:$Vs, I32:$Rt),
511 def: Pat<(VecI8 (Fptosi HWF16:$Vu)),
513 def: Pat<(VecI8 (Fptoui HWF16:$Vu)),
561 def: Pat<(mul HVI8:$Vs, HVI8:$Vt),
564 def: Pat<(mul HVI16:$Vs, HVI16:$Vt),
566 def: Pat<(mul HVI32:$Vs, HVI32:$Vt),
600 def: Pat<(VecQ8 (trunc HVI8:$Vs)),
703 def: Pat<(VecI8 (ctpop HVI8:$Vs)),
712 def: Pat<(VecI8 (ctlz HVI8:$Vs)),
[all …]
H A DHexagonIntrinsics.td12 : Pat <(IntID I32:$Rs),
16 : Pat <(IntID I32:$Rs, I32:$Rt),
20 : Pat <(IntID I32:$Rs, I64:$Rt),
72 def: Pat<(int_hexagon_A2_sxtb IntRegs:$Rs),
82 def : Pat <(int_hexagon_A2_not I32:$Rs),
86 def : Pat <(int_hexagon_A2_neg I32:$Rs),
282 def: Pat<(v64i16 (trunc v64i32:$Vdd)),
358 def: Pat<(int_hexagon_V6_vd0),
360 def: Pat<(int_hexagon_V6_vd0_128B ),
363 def: Pat<(int_hexagon_V6_vdd0),
[all …]
H A DHexagonMapAsm2IntrinV62.gen.td10 def: Pat<(IntID HvxVR:$src1, IntRegs:$src2),
25 def: Pat<(IntID HvxVR:$src1, HvxVR:$src2),
32 def: Pat<(IntID HvxWR:$src1, HvxWR:$src2),
39 def: Pat<(IntID HvxWR:$src1, HvxVR:$src2, HvxVR:$src3),
47 def: Pat<(IntID HvxWR:$src1, IntRegs:$src2),
54 def: Pat<(IntID HvxWR:$src1, HvxWR:$src2, IntRegs:$src3),
70 def: Pat<(IntID HvxQR:$src1, IntRegs:$src2),
85 def: Pat<(IntID HvxQR:$src1, HvxVR:$src2),
92 def: Pat<(IntID IntRegs:$src1),
99 def: Pat<(IntID HvxQR:$src1, HvxQR:$src2),
[all …]
H A DHexagonIntrinsicsV60.td70 def : Pat <(v64i1 (load (i32 IntRegs:$addr))),
91 def: Pat<(IntID HvxVR:$src1),
99 def: Pat<(IntID HvxWR:$src1),
107 def: Pat<(IntID HvxQR:$src1),
115 def: Pat<(IntID HvxWR:$src1, IntRegs:$src2),
123 def: Pat<(IntID HvxVR:$src1, IntRegs:$src2),
131 def: Pat<(IntID HvxWR:$src1, HvxVR:$src2),
139 def: Pat<(IntID HvxWR:$src1, HvxWR:$src2),
147 def: Pat<(IntID HvxVR:$src1, HvxVR:$src2),
163 def: Pat<(IntID HvxQR:$src1, HvxQR:$src2),
[all …]
H A DHexagonPatterns.td420 def: Pat<(i64 imm:$v),
518 def: Pat<(v2i16 (azext V2I1:$Pu)),
520 def: Pat<(v2i32 (azext V2I1:$Pu)),
522 def: Pat<(v4i8 (azext V4I1:$Pu)),
526 def: Pat<(v8i8 (azext V8I1:$Pu)),
1374 def: Pat<(fabs F64:$Rs),
1377 def: Pat<(fneg F64:$Rs),
1826 def: Pat<(i1 (trunc I32:$Rs)),
1828 def: Pat<(i1 (trunc I64:$Rs)),
2337 def: Pat<(i1 (load I32:$Rs)),
[all …]
/llvm-project-15.0.7/llvm/lib/Target/VE/
H A DVEInstrIntrinsicVL.gen.td640 def : Pat<(int_ve_vl_vseq_vl i32:$vl), (VSEQl i32:$vl)>;
642 def : Pat<(int_ve_vl_pvseqlo_vl i32:$vl), (PVSEQLOl i32:$vl)>;
644 def : Pat<(int_ve_vl_pvsequp_vl i32:$vl), (PVSEQUPl i32:$vl)>;
646 def : Pat<(int_ve_vl_pvseq_vl i32:$vl), (PVSEQl i32:$vl)>;
1062 def : Pat<(int_ve_vl_vfmklat_ml i32:$vl), (VFMKLal i32:$vl)>;
1063 def : Pat<(int_ve_vl_vfmklaf_ml i32:$vl), (VFMKLnal i32:$vl)>;
1064 def : Pat<(int_ve_vl_pvfmkat_Ml i32:$vl), (VFMKyal i32:$vl)>;
1655 def : Pat<(int_ve_vl_fencei ), (FENCEI )>;
1656 def : Pat<(int_ve_vl_fencem_s uimm2:$I), (FENCEM (LO7 $I))>;
1657 def : Pat<(int_ve_vl_fencec_s uimm3:$I), (FENCEC (LO7 $I))>;
[all …]
H A DVEInstrPatternsVec.td19 def: Pat<(i64 (repl_f32 f32:$val)),
23 def: Pat<(i64 (repl_i32 i32:$val)),
34 def : Pat<(v256i1 (load ADDRrii:$addr)),
36 def : Pat<(v512i1 (load ADDRrii:$addr)),
38 def : Pat<(store v256i1:$vx, ADDRrii:$addr),
40 def : Pat<(store v512i1:$vx, ADDRrii:$addr),
50 def : Pat<(v32 (vec_broadcast s32:$sy, i32:$vl)),
61 def : Pat<(v64 (vec_broadcast s64:$sy, i32:$vl)),
69 def: Pat<(s32 (extractelt v32:$vec, uimm7:$idx)),
72 def: Pat<(s32 (extractelt v32:$vec, i64:$idx)),
[all …]
H A DVEInstrIntrinsicVL.td6 def : Pat<(i64 (int_ve_vl_pack_f32p ADDRrii:$addr0, ADDRrii:$addr1)),
10 def : Pat<(i64 (int_ve_vl_pack_f32a ADDRrii:$addr)),
18 def : Pat<(v256i1 (int_ve_vl_extract_vm512u v512i1:$vm)),
21 def : Pat<(v256i1 (int_ve_vl_extract_vm512l v512i1:$vm)),
24 def : Pat<(v512i1 (int_ve_vl_insert_vm512u v512i1:$vmx, v256i1:$vmy)),
33 def : Pat<(int_ve_vl_vmrgw_vsvMvl i32:$sy, v256f64:$vz, v512i1:$vm,
39 def : Pat<(int_ve_vl_vmv_vsvl i32:$sy, v256f64:$vz, i32:$vl),
49 def : Pat<(int_ve_vl_lsv_vvss v256f64:$pt, i32:$sy, i64:$sz),
53 def : Pat<(int_ve_vl_lvsl_svs v256f64:$vx, i32:$sy),
55 def : Pat<(int_ve_vl_lvsd_svs v256f64:$vx, i32:$sy),
[all …]
/llvm-project-15.0.7/llvm/lib/Target/AArch64/
H A DAArch64InstrAtomics.td77 def : Pat<(relaxed_load<atomic_load_az_8>
109 def : Pat<(relaxed_load<atomic_load_32>
125 def : Pat<(relaxed_load<atomic_load_64>
182 def : Pat<(relaxed_store<atomic_store_8>
186 def : Pat<(relaxed_store<atomic_store_8>
313 def : Pat<(ldxr_1 GPR64sp:$addr),
315 def : Pat<(ldxr_2 GPR64sp:$addr),
317 def : Pat<(ldxr_4 GPR64sp:$addr),
354 def : Pat<(ldaxr_1 GPR64sp:$addr),
356 def : Pat<(ldaxr_2 GPR64sp:$addr),
[all …]
H A DAArch64InstrInfo.td1628 def : Pat<(f32 fpimm:$in),
1630 def : Pat<(f64 fpimm:$in),
5264 def : Pat<(v4i16 (opnode
5272 def : Pat<(v2i32 (opnode
5280 def : Pat<(v1i64 (opnode
7147 : Pat<(scalar_store
7164 : Pat<(scalar_store
7180 def : Pat<(scalar_store
7186 def : Pat<(scalar_store
7206 def : Pat<(scalar_store
[all …]
H A DAArch64SVEInstrInfo.td1507 def : Pat<(add nxv2i64:$Op1,
1511 def : Pat<(add nxv2i64:$Op1,
1518 def : Pat<(add Ty:$Op1,
1534 def : Pat<(add Ty:$Op1,
1540 def : Pat<(add Ty:$Op1,
2442 def : Pat<(nxv16i1 (and PPR:$Ps1, PPR:$Ps2)),
2444 def : Pat<(nxv8i1 (and PPR:$Ps1, PPR:$Ps2)),
2446 def : Pat<(nxv4i1 (and PPR:$Ps1, PPR:$Ps2)),
2448 def : Pat<(nxv2i1 (and PPR:$Ps1, PPR:$Ps2)),
2451 def : Pat<(nxv1i1 (and PPR:$Ps1, PPR:$Ps2)),
[all …]
/llvm-project-15.0.7/llvm/lib/Target/X86/
H A DX86InstrVecCompiler.td39 def : Pat<(v8f16 (scalar_to_vector FR16:$src)),
42 def : Pat<(v4f32 (scalar_to_vector FR32:$src)),
45 def : Pat<(v2f64 (scalar_to_vector FR64:$src)),
50 def : Pat<(v8f16 (scalar_to_vector FR16X:$src)),
53 def : Pat<(v4f32 (scalar_to_vector FR32X:$src)),
384 def : Pat<(alignedloadf128 addr:$src),
386 def : Pat<(loadf128 addr:$src),
396 def : Pat<(alignedloadf128 addr:$src),
398 def : Pat<(loadf128 addr:$src),
408 def : Pat<(alignedloadf128 addr:$src),
[all …]
H A DX86InstrCompiler.td1344 def : Pat<(X86cmp GR8:$src1, 0),
1346 def : Pat<(X86cmp GR16:$src1, 0),
1348 def : Pat<(X86cmp GR32:$src1, 0),
1350 def : Pat<(X86cmp GR64:$src1, 0),
1526 def : Pat<(xor GR8:$src1, -128),
1540 def : Pat<(add GR16:$src1, 128),
1545 def : Pat<(add GR32:$src1, 128),
1550 def : Pat<(add GR64:$src1, 128),
1625 def : Pat<(and GR64:$src, 0xff),
1681 def: Pat<(i16 (sext GR8:$src)),
[all …]
/llvm-project-15.0.7/llvm/lib/Target/PowerPC/
H A DPPCInstrVSX.td4400 def : Pat<(f32 (PPCfcfids
4407 def : Pat<(f64 (PPCfcfidu
4413 def : Pat<(f64 (PPCfcfid
4440 def : Pat<(f32 (PPCfcfids
4447 def : Pat<(f64 (PPCfcfidu
4453 def : Pat<(f64 (PPCfcfid
4705 def : Pat<(f32 (PPCfcfids
4713 def : Pat<(f64 (PPCfcfidu
4719 def : Pat<(f64 (PPCfcfid
4752 def : Pat<(f32 (PPCfcfids
[all …]
H A DPPCInstrHTM.td100 def : Pat<(int_ppc_tend i32:$R),
118 def : Pat<(int_ppc_tcheck),
124 def : Pat<(int_ppc_trechkpt),
127 def : Pat<(int_ppc_tsr i32:$L),
130 def : Pat<(int_ppc_get_texasr),
133 def : Pat<(int_ppc_get_texasru),
136 def : Pat<(int_ppc_get_tfhar),
139 def : Pat<(int_ppc_get_tfiar),
157 def : Pat<(int_ppc_tendall),
160 def : Pat<(int_ppc_tresume),
[all …]
H A DPPCInstrP10.td1841 def : Pat<(i32 (zext pattern)),
1843 def : Pat<(i64 (zext pattern)),
1846 def : Pat<(i32 (sext pattern)),
1848 def : Pat<(i64 (sext pattern)),
1903 def : Pat<(i32 (zext i1:$in)),
1905 def : Pat<(i64 (zext i1:$in)),
1907 def : Pat<(i32 (sext i1:$in)),
1909 def : Pat<(i64 (sext i1:$in)),
2044 def : Pat<(f32 nzFPImmAsi32:$A),
2052 def : Pat<(f32 nzFPImmAsi64:$A),
[all …]
H A DPPCInstrAltivec.td1041 def : Pat<(vnot (or v4i32:$A, v4i32:$B)),
1046 def : Pat<(fmul v4f32:$vA, v4f32:$vB),
1061 def : Pat<(PPCfre v4f32:$A), (VREFP $A)>;
1113 def : Pat<(v4i32 (fp_to_sint v4f32:$vA)),
1115 def : Pat<(v4i32 (fp_to_uint v4f32:$vA)),
1117 def : Pat<(v4f32 (sint_to_fp v4i32:$vA)),
1119 def : Pat<(v4f32 (uint_to_fp v4i32:$vA)),
1123 def : Pat<(v4f32 (ffloor v4f32:$vA)),
1125 def : Pat<(v4f32 (fceil v4f32:$vA)),
1127 def : Pat<(v4f32 (ftrunc v4f32:$vA)),
[all …]
/llvm-project-15.0.7/llvm/lib/Target/M68k/
H A DM68kInstrCompiler.td11 /// as well as Pat patterns used during instruction selection.
25 def : Pat<(add MxDRD32:$src, (MxWrapper tconstpool:$opd)),
27 def : Pat<(add MxARD32:$src, (MxWrapper tjumptable:$opd)),
29 def : Pat<(add MxARD32:$src, (MxWrapper tglobaladdr :$opd)),
31 def : Pat<(add MxARD32:$src, (MxWrapper texternalsym:$opd)),
33 def : Pat<(add MxARD32:$src, (MxWrapper tblockaddress:$opd)),
36 def : Pat<(store (i32 (MxWrapper tglobaladdr:$src)), iPTR:$dst),
100 def : Pat<(MxTCRet (load MxCP_ARII:$dst), imm:$adj),
104 def : Pat<(MxTCRet AR32_TC:$dst, imm:$adj),
107 def : Pat<(MxTCRet (i32 tglobaladdr:$dst), imm:$adj),
[all …]
/llvm-project-15.0.7/llvm/lib/Target/CSKY/
H A DCSKYInstrInfoF2.td376 def : Pat<(i32 (setcc FPR32Op:$rs1, fpimm0, SETOGE)),
382 def : Pat<(i32 (setcc FPR32Op:$rs1, fpimm0, SETOLT)),
388 def : Pat<(i32 (setcc FPR32Op:$rs1, fpimm0, SETOLE)),
394 def : Pat<(i32 (setcc FPR32Op:$rs1, fpimm0, SETOGT)),
406 def : Pat<(i32 (setcc FPR32Op:$rs1, fpimm, SETUO)),
412 def : Pat<(i32 (setcc FPR32Op:$rs1, fpimm0, SETGE)),
418 def : Pat<(i32 (setcc FPR32Op:$rs1, fpimm0, SETLT)),
424 def : Pat<(i32 (setcc FPR32Op:$rs1, fpimm0, SETLE)),
430 def : Pat<(i32 (setcc FPR32Op:$rs1, fpimm0, SETGT)),
438 def : Pat<(i32 (setcc FPR32Op:$rs1, fpimm, SETO)),
[all …]
H A DCSKYInstrInfoF1.td168 def : Pat<(f32 (sint_to_fp GPR:$a)),
173 def : Pat<(f32 (uint_to_fp GPR:$a)),
178 def : Pat<(f64 (sint_to_fp GPR:$a)),
183 def : Pat<(f64 (uint_to_fp GPR:$a)),
213 def : Pat<(i32 (fp_to_sint (round sFPR32Op:$Rn))),
216 def : Pat<(i32 (fp_to_uint (round sFPR32Op:$Rn))),
219 def : Pat<(i32 (fp_to_sint (round sFPR64Op:$Rn))),
232 def : Pat<(i32 (fp_to_sint sFPR32Op:$Rn)),
235 def : Pat<(i32 (fp_to_uint sFPR32Op:$Rn)),
238 def : Pat<(i32 (fp_to_sint sFPR64Op:$Rn)),
[all …]
/llvm-project-15.0.7/llvm/lib/Target/Sparc/
H A DSparcInstr64Bit.td39 def : Pat<(i64 (zext i32:$val)), (SRLri $val, 0)>;
40 def : Pat<(i64 (sext i32:$val)), (SRAri $val, 0)>;
42 def : Pat<(i64 (and i64:$val, 0xffffffff)), (SRLri $val, 0)>;
68 def : Pat<(i64 SETHIimm:$val), (SETHIi (HI22 $val))>;
131 def : Pat<(i64 imm:$val),
178 def : Pat<(SPcmpicc i64:$a, i64:$b), (CMPrr $a, $b)>;
180 def : Pat<(i64 (ctpop i64:$src)), (POPCrr $src)>;
470 def : Pat<(SPselectxcc i64:$t, i64:$f, imm:$cond),
475 def : Pat<(SPselecticc i64:$t, i64:$f, imm:$cond),
480 def : Pat<(SPselectfcc i64:$t, i64:$f, imm:$cond),
[all …]
/llvm-project-15.0.7/mlir/lib/Dialect/Arithmetic/IR/
H A DArithmeticCanonicalization.td30 Pat<(Arith_AddIOp:$res
37 Pat<(Arith_AddIOp:$res
44 Pat<(Arith_AddIOp:$res
55 Pat<(Arith_SubIOp:$res
62 Pat<(Arith_SubIOp:$res
69 Pat<(Arith_SubIOp:$res
76 Pat<(Arith_SubIOp:$res
83 Pat<(Arith_SubIOp:$res
90 Pat<(Arith_SubIOp:$res
105 Pat<(Arith_XOrIOp
[all …]
/llvm-project-15.0.7/llvm/lib/Target/RISCV/
H A DRISCVInstrInfoZfh.td257 def : Pat<(f16 (fpimm0)), (FMV_H_X X0)>;
274 def : Pat<(fneg FPR16:$rs1), (FSGNJN_H $rs1, $rs1)>;
275 def : Pat<(fabs FPR16:$rs1), (FSGNJX_H $rs1, $rs1)>;
279 def : Pat<(fcopysign FPR16:$rs1, FPR32:$rs2),
284 def : Pat<(any_fma FPR16:$rs1, FPR16:$rs2, FPR16:$rs3),
322 def : Pat<(strict_fsetccs FPR16:$rs1, FPR16:$rs2, SETEQ),
325 def : Pat<(strict_fsetccs FPR16:$rs1, FPR16:$rs2, SETOEQ),
329 def : Pat<(strict_fsetccs FPR16:$rs1, FPR16:$rs1, SETEQ),
331 def : Pat<(strict_fsetccs FPR16:$rs1, FPR16:$rs1, SETOEQ),
358 def : Pat<(riscv_fmv_h_x GPR:$src), (FMV_H_X GPR:$src)>;
[all …]
H A DRISCVInstrInfoD.td272 def : Pat<(fneg FPR64:$rs1), (FSGNJN_D $rs1, $rs1)>;
273 def : Pat<(fabs FPR64:$rs1), (FSGNJX_D $rs1, $rs1)>;
282 def : Pat<(any_fma FPR64:$rs1, FPR64:$rs2, FPR64:$rs3),
320 def : Pat<(strict_fsetccs FPR64:$rs1, FPR64:$rs2, SETEQ),
323 def : Pat<(strict_fsetccs FPR64:$rs1, FPR64:$rs2, SETOEQ),
327 def : Pat<(strict_fsetccs FPR64:$rs1, FPR64:$rs1, SETEQ),
329 def : Pat<(strict_fsetccs FPR64:$rs1, FPR64:$rs1, SETOEQ),
366 def : Pat<(f64 (fpimm0)), (FCVT_D_W (i32 X0))>;
367 def : Pat<(f64 (fpimmneg0)), (FSGNJN_D (FCVT_D_W (i32 X0)),
392 def : Pat<(f64 (fpimm0)), (FMV_D_X (i64 X0))>;
[all …]

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