Searched refs:Packing (Results 1 – 12 of 12) sorted by relevance
| /llvm-project-15.0.7/llvm/lib/Target/VE/ |
| H A D | VECustomDAG.h | 119 enum class Packing { enum 125 MVT getLegalVectorType(Packing P, MVT ElemVT); 128 Packing getTypePacking(EVT); 201 SDValue getConstantMask(Packing Packing, bool AllTrue) const;
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| H A D | VVPISelLowering.cpp | 61 auto Packing = getTypePacking(LegalVecVT.getSimpleVT()); in lowerToVVP() local 80 Mask = CDAG.getConstantMask(Packing, true); in lowerToVVP() 141 auto Packing = getTypePacking(DataVT); in lowerVVP_LOAD_STORE() local 149 Mask = CDAG.getConstantMask(Packing, true); in lowerVVP_LOAD_STORE() 153 Packing, DataVT.getVectorElementType().getSimpleVT()); in lowerVVP_LOAD_STORE() 182 assert(getTypePacking(DataVT) == Packing::Dense && in splitPackedLoadStore() 256 getLegalVectorType(Packing::Dense, DataVT.getVectorElementType()); in splitPackedLoadStore() 266 auto Packing = getTypePacking(DataVT); in lowerVVP_GATHER_SCATTER() local 268 getLegalVectorType(Packing, DataVT.getVectorElementType().getSimpleVT()); in lowerVVP_GATHER_SCATTER() 289 Mask = CDAG.getConstantMask(Packing, true); in lowerVVP_GATHER_SCATTER()
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| H A D | VECustomDAG.cpp | 34 MVT getLegalVectorType(Packing P, MVT ElemVT) { in getLegalVectorType() 35 return MVT::getVectorVT(ElemVT, P == Packing::Normal ? StandardVectorWidth in getLegalVectorType() 39 Packing getTypePacking(EVT VT) { in getTypePacking() 41 return isPackedVectorType(VT) ? Packing::Dense : Packing::Normal; in getTypePacking() 409 SDValue VECustomDAG::getConstantMask(Packing Packing, bool AllTrue) const { in getConstantMask() argument 410 auto MaskVT = getLegalVectorType(Packing, MVT::i1); in getConstantMask() 514 NewMask = getConstantMask(Packing::Normal, true); in getTargetSplitMask()
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| H A D | VEInstrPatternsVec.td | 130 ///// Packing support ///// 144 multiclass Packing<ValueType PackVT> { 158 defm : Packing<v512i32>; 159 defm : Packing<v512f32>;
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| /llvm-project-15.0.7/llvm/docs/ |
| H A D | AMDGPUInstructionSyntax.rst | 33 * :ref:`Packing suffix<amdgpu_syn_instruction_pk>`. 40 Packing Suffix
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| H A D | CodeGenerator.rst | 582 Packing / bundling of MachineInstrs for VLIW architectures should
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| /llvm-project-15.0.7/clang-tools-extra/docs/clang-tidy/checks/altera/ |
| H A D | struct-pack-align.rst | 21 // 12 bytes of memory instead of 10. Packing the struct will make it use
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| /llvm-project-15.0.7/mlir/docs/ |
| H A D | DeclarativeRewrites.md | 53 * Packing and unpacking variadic operands/results during generation.
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| H A D | TargetLLVMIR.md | 301 #### Function Result Packing
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| /llvm-project-15.0.7/llvm/include/llvm/IR/ |
| H A D | IntrinsicsARM.td | 77 // Packing and unpacking
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| /llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/GlobalISel/ |
| H A D | cvt_f32_ubyte.ll | 526 ; FIXME: Packing bytes
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| /llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/ |
| H A D | cvt_f32_ubyte.ll | 1313 ; FIXME: Packing bytes
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