Home
last modified time | relevance | path

Searched refs:PacketMI (Results 1 – 2 of 2) sorted by relevance

/llvm-project-15.0.7/llvm/lib/Target/Hexagon/
H A DHexagonVLIWPacketizer.cpp651 const MachineInstr &PacketMI, unsigned DepReg) { in canPromoteToNewValueStore() argument
661 const MCInstrDesc& MCID = PacketMI.getDesc(); in canPromoteToNewValueStore()
684 if (HII->isPostIncrement(PacketMI) && PacketMI.mayLoad() && in canPromoteToNewValueStore()
685 getPostIncrementOperand(PacketMI, HII).getReg() == DepReg) { in canPromoteToNewValueStore()
694 if (isLoadAbsSet(PacketMI) && getAbsSetOperand(PacketMI).getReg() == DepReg) in canPromoteToNewValueStore()
699 if (HII->isPredicated(PacketMI)) { in canPromoteToNewValueStore()
710 for (auto &MO : PacketMI.operands()) { in canPromoteToNewValueStore()
742 HII->isDotNewInst(PacketMI) != HII->isDotNewInst(MI) || in canPromoteToNewValueStore()
794 for (auto &MO : PacketMI.operands()) { in canPromoteToNewValueStore()
826 MachineInstr &PacketMI = *PacketSU->getInstr(); in canPromoteToNewValue() local
[all …]
H A DHexagonVLIWPacketizer.h138 const MachineInstr &PacketMI, unsigned DepReg);