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Searched refs:PPCTargetLowering (Results 1 – 10 of 10) sorted by relevance

/llvm-project-15.0.7/llvm/lib/Target/PowerPC/GISel/
H A DPPCCallLowering.h23 class PPCTargetLowering; variable
27 PPCCallLowering(const PPCTargetLowering &TLI);
H A DPPCCallLowering.cpp30 PPCCallLowering::PPCCallLowering(const PPCTargetLowering &TLI) in PPCCallLowering()
58 auto &TLI = *getTLI<PPCTargetLowering>(); in lowerFormalArguments()
/llvm-project-15.0.7/llvm/lib/Target/PowerPC/
H A DPPCISelLowering.cpp153 PPCTargetLowering::PPCTargetLowering(const PPCTargetMachine &TM, in PPCTargetLowering() function in PPCTargetLowering
1599 bool PPCTargetLowering::hasSPE() const { in hasSPE()
2639 bool PPCTargetLowering::SelectAddressRegReg( in SelectAddressRegReg()
2730 bool PPCTargetLowering::SelectAddressRegImm( in SelectAddressRegImm()
5131 SDValue PPCTargetLowering::LowerCallResult( in LowerCallResult()
5563 SDValue PPCTargetLowering::FinishCall( in FinishCall()
7215 SDValue PPCTargetLowering::LowerCall_AIX( in LowerCall_AIX()
14008 SDValue PPCTargetLowering::
15985 PPCTargetLowering::ConstraintType
16575 EVT PPCTargetLowering::getOptimalMemOpType( in getOptimalMemOpType()
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H A DPPCTargetTransformInfo.h32 const PPCTargetLowering *TLI;
35 const PPCTargetLowering *getTLI() const { return TLI; } in getTLI()
H A DPPCSubtarget.h179 PPCTargetLowering TLInfo;
218 const PPCTargetLowering *getTargetLowering() const override { in getTargetLowering()
H A DPPCISelLowering.h742 class PPCTargetLowering : public TargetLowering {
746 explicit PPCTargetLowering(const PPCTargetMachine &TM,
H A DREADME_ALTIVEC.txt299 is used in PPCISelLowering.cpp, PPCTargetLowering::LOWERVECTOR_SHUFFLE().
H A DPPCFrameLowering.cpp542 const PPCTargetLowering &TLI = *Subtarget.getTargetLowering(); in twoUniqueScratchRegsRequired()
611 const PPCTargetLowering &TLI = *Subtarget.getTargetLowering(); in emitPrologue()
1223 const PPCTargetLowering &TLI = *Subtarget.getTargetLowering(); in inlineStackProbe()
H A DPPCISelDAGToDAG.cpp144 const PPCTargetLowering *PPCLowering = nullptr;
/llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/
H A Dzext-bitperm.ll5 ; Test case for PPCTargetLowering::extendSubTreeForBitPermutation.