Searched refs:OpcodeMask (Results 1 – 6 of 6) sorted by relevance
| /llvm-project-15.0.7/llvm/lib/Target/X86/ |
| H A D | X86TargetTransformInfo.h | 245 const SmallBitVector &OpcodeMask) const;
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| H A D | X86TargetTransformInfo.cpp | 5360 const SmallBitVector &OpcodeMask) const { in isLegalAltInstr()
5369 assert(OpcodeMask.size() == NumElements && "Mask and VecTy are incompatible"); in isLegalAltInstr()
5375 unsigned Opc = OpcodeMask.test(Lane) ? Opcode1 : Opcode0; in isLegalAltInstr()
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| /llvm-project-15.0.7/llvm/include/llvm/Analysis/ |
| H A D | TargetTransformInfo.h | 697 const SmallBitVector &OpcodeMask) const;
1613 const SmallBitVector &OpcodeMask) const = 0;
2042 const SmallBitVector &OpcodeMask) const override { in isLegalAltInstr() argument
2043 return Impl.isLegalAltInstr(VecTy, Opcode0, Opcode1, OpcodeMask); in isLegalAltInstr()
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| H A D | TargetTransformInfoImpl.h | 283 const SmallBitVector &OpcodeMask) const { in isLegalAltInstr() argument
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| /llvm-project-15.0.7/llvm/lib/Analysis/ |
| H A D | TargetTransformInfo.cpp | 419 const SmallBitVector &OpcodeMask) const { in isLegalAltInstr()
420 return TTIImpl->isLegalAltInstr(VecTy, Opcode0, Opcode1, OpcodeMask); in isLegalAltInstr()
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| /llvm-project-15.0.7/llvm/lib/Transforms/Vectorize/ |
| H A D | SLPVectorizer.cpp | 3747 SmallBitVector OpcodeMask(TE->Scalars.size(), false); in reorderTopToBottom() local
3750 OpcodeMask.set(Lane); in reorderTopToBottom()
3752 if (TTIRef.isLegalAltInstr(VecTy, Opcode0, Opcode1, OpcodeMask)) { in reorderTopToBottom()
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