| /llvm-project-15.0.7/llvm/lib/Target/AVR/ |
| H A D | AVRExpandPseudoInsts.cpp | 170 buildMI(MBB, MBBI, OpLo) in expandArith()
362 buildMI(MBB, MBBI, OpLo) in expand()
419 unsigned OpLo = AVR::COMRd; in expand() local
424 buildMI(MBB, MBBI, OpLo) in expand()
490 unsigned OpLo = AVR::CPRdRr; in expand() local
496 buildMI(MBB, MBBI, OpLo) in expand()
555 unsigned OpLo = AVR::LDIRdK; in expand() local
560 buildMI(MBB, MBBI, OpLo) in expand()
1324 buildMI(MBB, MBBI, OpLo) in expand()
1433 buildMI(MBB, MBBI, OpLo) in expand()
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| /llvm-project-15.0.7/llvm/lib/Target/Hexagon/ |
| H A D | HexagonConstPropagation.cpp | 1962 const MachineOperand &OpLo = LoIs1 ? MI.getOperand(1) : MI.getOperand(3); in evaluate() local
1965 RegisterSubReg SrcRL(OpLo), SrcRH(OpHi); in evaluate()
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| /llvm-project-15.0.7/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeVectorTypes.cpp | 1548 SDValue OpLo = Op; in SplitVecRes_StrictFPOp() local
1556 GetSplitVector(Op, OpLo, OpHi); in SplitVecRes_StrictFPOp()
1558 std::tie(OpLo, OpHi) = DAG.SplitVectorOperand(N, i); in SplitVecRes_StrictFPOp()
1561 OpsLo[i] = OpLo; in SplitVecRes_StrictFPOp()
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| /llvm-project-15.0.7/llvm/lib/Target/AMDGPU/ |
| H A D | SIISelLowering.cpp | 4580 SDValue OpLo = DAG.getNode(Opc, SL, Lo.getValueType(), Lo, in splitUnaryVectorOp() local
4585 return DAG.getNode(ISD::CONCAT_VECTORS, SDLoc(Op), VT, OpLo, OpHi); in splitUnaryVectorOp()
4606 SDValue OpLo = DAG.getNode(Opc, SL, Lo0.getValueType(), Lo0, Lo1, in splitBinaryVectorOp() local
4611 return DAG.getNode(ISD::CONCAT_VECTORS, SDLoc(Op), VT, OpLo, OpHi); in splitBinaryVectorOp()
4636 SDValue OpLo = DAG.getNode(Opc, SL, ResVT.first, Lo0, Lo1, Lo2, in splitTernaryVectorOp() local
4641 return DAG.getNode(ISD::CONCAT_VECTORS, SDLoc(Op), VT, OpLo, OpHi); in splitTernaryVectorOp()
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| /llvm-project-15.0.7/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 21837 SDValue OpLo = DAG.getNode(ExtendInVecOpc, dl, HalfVT, In); in LowerAVXExtend() local
21843 return DAG.getNode(ISD::CONCAT_VECTORS, dl, VT, OpLo, OpLo); in LowerAVXExtend()
21851 return DAG.getNode(ISD::CONCAT_VECTORS, dl, VT, OpLo, OpHi); in LowerAVXExtend()
22214 SDValue OpLo = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, MVT::v2i64, In, in LowerTRUNCATE() local
22219 return DAG.getVectorShuffle(VT, DL, DAG.getBitcast(MVT::v4i32, OpLo), in LowerTRUNCATE()
22242 SDValue OpLo = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, MVT::v4i32, In, in LowerTRUNCATE() local
22250 OpLo = DAG.getBitcast(MVT::v8i16, OpLo); in LowerTRUNCATE()
22253 OpLo = DAG.getVectorShuffle(MVT::v8i16, DL, OpLo, OpLo, ShufMask1); in LowerTRUNCATE()
22256 OpLo = DAG.getBitcast(MVT::v4i32, OpLo); in LowerTRUNCATE()
25569 SDValue OpLo = DAG.getNode(ISD::SIGN_EXTEND_VECTOR_INREG, dl, HalfVT, In); in LowerSIGN_EXTEND() local
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