| /llvm-project-15.0.7/llvm/lib/MCA/ |
| H A D | InstrBuilder.cpp | 369 Write.OpIndex = i; in populateWrites() 396 Write.OpIndex = ~CurrentDef; in populateWrites() 423 Write.OpIndex = OptionalDefIdx; in populateWrites() 442 const MCOperand &Op = MCI.getOperand(OpIndex); in populateWrites() 447 Write.OpIndex = OpIndex; in populateWrites() 476 ++I, ++OpIndex) { in populateReads() 477 const MCOperand &Op = MCI.getOperand(OpIndex); in populateReads() 482 Read.OpIndex = OpIndex; in populateReads() 494 Read.OpIndex = ~I; in populateReads() 508 const MCOperand &Op = MCI.getOperand(OpIndex); in populateReads() [all …]
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| H A D | Instruction.cpp | 126 dbgs() << "{ OpIdx=" << WD->OpIndex << ", Lat=" << getLatency() << ", RegID " in dump()
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| /llvm-project-15.0.7/llvm/utils/TableGen/ |
| H A D | PredicateExpander.h | 58 void expandCheckImmOperand(raw_ostream &OS, int OpIndex, int ImmVal, 60 void expandCheckImmOperand(raw_ostream &OS, int OpIndex, StringRef ImmVal, 62 void expandCheckImmOperandSimple(raw_ostream &OS, int OpIndex, 64 void expandCheckRegOperand(raw_ostream &OS, int OpIndex, const Record *Reg, 66 void expandCheckRegOperandSimple(raw_ostream &OS, int OpIndex, 77 void expandCheckIsRegOperand(raw_ostream &OS, int OpIndex); 78 void expandCheckIsImmOperand(raw_ostream &OS, int OpIndex); 79 void expandCheckInvalidRegOperand(raw_ostream &OS, int OpIndex);
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| H A D | PredicateExpander.cpp | 26 OS << "MI" << (isByRef() ? "." : "->") << "getOperand(" << OpIndex in expandCheckImmOperand() 37 expandCheckImmOperandSimple(OS, OpIndex, FunctionMapper); in expandCheckImmOperand() 41 OS << "MI" << (isByRef() ? "." : "->") << "getOperand(" << OpIndex in expandCheckImmOperand() 49 int OpIndex, in expandCheckImmOperandSimple() argument 55 OS << "MI" << (isByRef() ? "." : "->") << "getOperand(" << OpIndex in expandCheckImmOperandSimple() 68 OS << "MI" << (isByRef() ? "." : "->") << "getOperand(" << OpIndex in expandCheckRegOperand() 81 int OpIndex, in expandCheckRegOperandSimple() argument 87 OS << "MI" << (isByRef() ? "." : "->") << "getOperand(" << OpIndex in expandCheckRegOperandSimple() 94 int OpIndex) { in expandCheckInvalidRegOperand() argument 193 << "getOperand(" << OpIndex << ").isReg() "; in expandCheckIsRegOperand() [all …]
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| H A D | AsmWriterEmitter.cpp | 743 int OpIndex, PrintIndex; in formatAliasString() local 744 std::tie(OpIndex, PrintIndex) = getOpData(Name); in formatAliasString() 747 OS << format("\\x%02X", (unsigned char)OpIndex + 1); in formatAliasString() 752 OS << format("\\xFF\\x%02X\\x%02X", OpIndex + 1, PrintIndex + 1); in formatAliasString()
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| /llvm-project-15.0.7/llvm/tools/llvm-exegesis/lib/ |
| H A D | MCInstrDescView.cpp | 110 unsigned OpIndex = 0; in create() local 113 for (; OpIndex < Description->getNumOperands(); ++OpIndex) { in create() 114 const auto &OpInfo = Description->opInfo_begin()[OpIndex]; in create() 116 Operand.Index = OpIndex; in create() 117 Operand.IsDef = (OpIndex < Description->getNumDefs()); in create() 121 int TiedToIndex = Description->getOperandConstraint(OpIndex, MCOI::TIED_TO); in create() 132 MCPhysReg && *MCPhysReg; ++MCPhysReg, ++OpIndex) { in create() 134 Operand.Index = OpIndex; in create() 141 MCPhysReg && *MCPhysReg; ++MCPhysReg, ++OpIndex) { in create() 143 Operand.Index = OpIndex; in create()
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| H A D | Assembler.cpp | 98 for (unsigned OpIndex = 0, E = Inst.getNumOperands(); OpIndex < E; in addInstruction() local 99 ++OpIndex) { in addInstruction() 100 const MCOperand &Op = Inst.getOperand(OpIndex); in addInstruction() 102 const bool IsDef = OpIndex < MCID.getNumDefs(); in addInstruction() 104 const MCOperandInfo &OpInfo = MCID.operands().begin()[OpIndex]; in addInstruction()
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| /llvm-project-15.0.7/llvm/lib/Target/Mips/MCTargetDesc/ |
| H A D | MipsELFStreamer.cpp | 43 for (unsigned OpIndex = 0; OpIndex < Inst.getNumOperands(); ++OpIndex) { in emitInstruction() local 44 const MCOperand &Op = Inst.getOperand(OpIndex); in emitInstruction()
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| /llvm-project-15.0.7/llvm/lib/Target/ARM/MCTargetDesc/ |
| H A D | ARMMCTargetDesc.cpp | 582 unsigned OpIndex = Desc.NumDefs; in evaluateMemoryOperandAddress() local 583 while (OpIndex < Desc.getNumOperands() && in evaluateMemoryOperandAddress() 584 Desc.OpInfo[OpIndex].OperandType != MCOI::OPERAND_MEMORY) in evaluateMemoryOperandAddress() 585 ++OpIndex; in evaluateMemoryOperandAddress() 586 if (OpIndex == Desc.getNumOperands()) in evaluateMemoryOperandAddress() 614 return evaluateMemOpAddrForAddrMode_i12(Inst, Desc, OpIndex, Addr); in evaluateMemoryOperandAddress() 616 return evaluateMemOpAddrForAddrMode3(Inst, Desc, OpIndex, Addr); in evaluateMemoryOperandAddress() 618 return evaluateMemOpAddrForAddrMode5(Inst, Desc, OpIndex, Addr); in evaluateMemoryOperandAddress() 620 return evaluateMemOpAddrForAddrMode5FP16(Inst, Desc, OpIndex, Addr); in evaluateMemoryOperandAddress() 624 return evaluateMemOpAddrForAddrModeT2_pc(Inst, Desc, OpIndex, Addr); in evaluateMemoryOperandAddress() [all …]
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| /llvm-project-15.0.7/llvm/include/llvm/MCA/ |
| H A D | Instruction.h | 139 int OpIndex; member 159 bool isImplicitWrite() const { return OpIndex < 0; }; in isImplicitWrite() 167 int OpIndex; member 177 bool isImplicitRead() const { return OpIndex < 0; }; in isImplicitRead()
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| /llvm-project-15.0.7/llvm/lib/Target/SPIRV/ |
| H A D | SPIRVModuleAnalysis.cpp | 46 static unsigned getMetadataUInt(MDNode *MdNode, unsigned OpIndex, in getMetadataUInt() argument 48 if (MdNode && OpIndex < MdNode->getNumOperands()) { in getMetadataUInt() 49 const auto &Op = MdNode->getOperand(OpIndex); in getMetadataUInt()
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| /llvm-project-15.0.7/mlir/lib/Conversion/PDLToPDLInterp/ |
| H A D | PredicateTree.cpp | 355 struct OpIndex { struct 362 using ParentMaps = DenseMap<Value, DenseMap<Value, OpIndex>>; 437 DenseMap<Value, OpIndex> &parentMap = parentMaps[root]; in buildCostGraph() 520 OpIndex opIndex, PredicateBuilder &builder, in visitUpward() 674 DenseMap<Value, OpIndex> parentMap = parentMaps.lookup(target); in buildPredicateList() 680 OpIndex opIndex = parentMap.lookup(value); in buildPredicateList()
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| /llvm-project-15.0.7/llvm/lib/Target/X86/ |
| H A D | X86InstructionSelector.cpp | 1570 unsigned OpIndex; in selectDivRem() local 1575 OpIndex = 0; in selectDivRem() 1578 OpIndex = 1; in selectDivRem() 1581 OpIndex = 2; in selectDivRem() 1584 OpIndex = 3; in selectDivRem() 1589 const DivRemEntry::DivRemResult &OpEntry = TypeEntry.ResultTable[OpIndex]; in selectDivRem()
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| H A D | X86FastISel.cpp | 1927 unsigned TypeIndex, OpIndex; in X86SelectDivRem() local 1941 case Instruction::SDiv: OpIndex = 0; break; in X86SelectDivRem() 1942 case Instruction::SRem: OpIndex = 1; break; in X86SelectDivRem() 1943 case Instruction::UDiv: OpIndex = 2; break; in X86SelectDivRem() 1944 case Instruction::URem: OpIndex = 3; break; in X86SelectDivRem() 1948 const DivRemEntry::DivRemResult &OpEntry = TypeEntry.ResultTable[OpIndex]; in X86SelectDivRem()
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| H A D | X86ISelLowering.cpp | 18568 unsigned OpIndex = i / 2; in lowerV4X128Shuffle() local 18569 if (Ops[OpIndex].isUndef()) in lowerV4X128Shuffle() 18570 Ops[OpIndex] = Op; in lowerV4X128Shuffle() 18571 else if (Ops[OpIndex] != Op) in lowerV4X128Shuffle() 38001 unsigned OpIndex = i / 2; in combineX86ShuffleChain() local 38002 if (Ops[OpIndex].isUndef()) in combineX86ShuffleChain() 38003 Ops[OpIndex] = Op; in combineX86ShuffleChain() 38004 else if (Ops[OpIndex] != Op) in combineX86ShuffleChain()
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| /llvm-project-15.0.7/llvm/lib/Analysis/ |
| H A D | TypeBasedAliasAnalysis.cpp | 297 unsigned OpIndex = FirstFieldOpNo + FieldIndex * NumOpsPerField; in getFieldType() local 298 auto *TypeNode = cast<MDNode>(getNode()->getOperand(OpIndex)); in getFieldType()
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| /llvm-project-15.0.7/llvm/lib/Target/Hexagon/Disassembler/ |
| H A D | HexagonDisassembler.cpp | 470 unsigned OpIndex = HexagonMCInstrInfo::getNewValueOp(*MCII, MI); in getSingleInstruction() local 471 MCOperand &MCO = MI.getOperand(OpIndex); in getSingleInstruction()
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| /llvm-project-15.0.7/llvm/lib/Target/AArch64/ |
| H A D | AArch64FrameLowering.cpp | 3867 int OpIndex; in orderFrameObjects() local 3871 OpIndex = 3; in orderFrameObjects() 3877 OpIndex = 1; in orderFrameObjects() 3880 OpIndex = -1; in orderFrameObjects() 3884 if (OpIndex >= 0) { in orderFrameObjects() 3885 const MachineOperand &MO = MI.getOperand(OpIndex); in orderFrameObjects()
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| /llvm-project-15.0.7/llvm/include/llvm/Target/ |
| H A D | TargetInstrPredicate.td | 92 int OpIndex = Index;
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