Searched refs:OpDesc (Results 1 – 2 of 2) sorted by relevance
| /llvm-project-15.0.7/llvm/lib/FuzzMutate/ |
| H A D | IRMutator.cpp | 130 auto OpDesc = chooseOperation(Srcs[0], IB); in mutate() local
132 if (!OpDesc) in mutate()
135 for (const auto &Pred : makeArrayRef(OpDesc->SourcePreds).slice(1)) in mutate()
138 if (Value *Op = OpDesc->BuilderFunc(Srcs, Insts[IP])) { in mutate()
|
| /llvm-project-15.0.7/llvm/lib/Target/AMDGPU/ |
| H A D | SIInstrInfo.cpp | 1544 const MCInstrDesc &OpDesc = get(getSGPRSpillSaveOpcode(SpillSize)); in storeRegToStackSlot() local
1552 BuildMI(MBB, MI, DL, OpDesc) in storeRegToStackSlot()
1710 const MCInstrDesc &OpDesc = get(getSGPRSpillRestoreOpcode(SpillSize)); in loadRegFromStackSlot() local
1718 BuildMI(MBB, MI, DL, OpDesc, DestReg) in loadRegFromStackSlot()
2004 const MCInstrDesc &OpDesc = get(Opc); in expandPostRAPseudo() local
2011 BuildMI(MBB, MI, DL, OpDesc) in expandPostRAPseudo()
2018 OpDesc.getNumOperands() + OpDesc.getNumImplicitUses(); in expandPostRAPseudo()
2043 const MCInstrDesc &OpDesc = get(AMDGPU::V_MOV_B32_indirect_write); in expandPostRAPseudo() local
2045 BuildMI(MBB, MI, DL, OpDesc) in expandPostRAPseudo()
2052 const int ImpDefIdx = OpDesc.getNumOperands() + OpDesc.getNumImplicitUses(); in expandPostRAPseudo()
|