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Searched refs:Op0VT (Results 1 – 2 of 2) sorted by relevance

/llvm-project-15.0.7/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.cpp3127 EVT Op0VT = Op0.getValueType(); in LowerOperation() local
3144 if (!VT.isVector() && !Op0VT.isVector()) { in LowerOperation()
3145 if (isTypeLegal(VT) && isTypeLegal(Op0VT)) in LowerOperation()
3150 assert(!VT.isScalableVector() && !Op0VT.isScalableVector() && in LowerOperation()
3156 if (Op0VT.isFixedLengthVector()) in LowerOperation()
3161 if (!Op0VT.isVector()) { in LowerOperation()
3162 EVT BVT = EVT::getVectorVT(*DAG.getContext(), Op0VT, 1); in LowerOperation()
3174 if (!VT.isVector() && Op0VT.isFixedLengthVector()) { in LowerOperation()
7116 EVT Op0VT = Op0.getValueType(); in ReplaceNodeResults() local
7126 } else if (!VT.isVector() && Op0VT.isFixedLengthVector() && in ReplaceNodeResults()
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/llvm-project-15.0.7/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.cpp13894 EVT Op0VT = A.getOperand(0).getValueType(); in performVecReduceAddCombine() local
13895 if (Op0VT != MVT::v8i8 && Op0VT != MVT::v16i8) in performVecReduceAddCombine()
13902 B = DAG.getConstant(1, DL, Op0VT); in performVecReduceAddCombine()
13907 DAG.getConstant(0, DL, Op0VT == MVT::v8i8 ? MVT::v2i32 : MVT::v4i32); in performVecReduceAddCombine()