| /llvm-project-15.0.7/clang/test/Analysis/ |
| H A D | NewDelete-path-notes.cpp | 23 struct Odd { struct
29 void test(Odd *odd) { in test() argument
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| /llvm-project-15.0.7/llvm/test/TableGen/ |
| H A D | list-element-bitref.td | 7 string V2 = !if(L[0]{0}, "Odd", "Even");
15 // CHECK-NEXT: string V2 = "Odd";
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| /llvm-project-15.0.7/llvm/lib/Target/ARM/ |
| H A D | ARMBaseRegisterInfo.cpp | 327 static MCPhysReg getPairedGPR(MCPhysReg Reg, bool Odd, in getPairedGPR() argument
331 return RI->getSubReg(*Supers, Odd ? ARM::gsub_1 : ARM::gsub_0); in getPairedGPR()
343 unsigned Odd; in getRegAllocationHints() local
346 Odd = 0; in getRegAllocationHints()
349 Odd = 1; in getRegAllocationHints()
371 PairedPhys = getPairedGPR(VRM->getPhys(Paired), Odd, this); in getRegAllocationHints()
380 if (Reg == PairedPhys || (getEncodingValue(Reg) & 1) != Odd) in getRegAllocationHints()
383 MCPhysReg Paired = getPairedGPR(Reg, !Odd, this); in getRegAllocationHints()
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| /llvm-project-15.0.7/llvm/lib/Target/PowerPC/ |
| H A D | PPCScheduleP9.td | 73 // Even or an Odd queue. The EXECE represents the even queues and the EXECO
82 //Odd Exec Ports
87 // Four ALU (Fixed Point Arithmetic) units in total. Two even, two Odd.
94 //Odd ALU pipelines
101 // Four DP (Floating Point) units in total. Two even, two Odd.
108 //Odd DP pipelines
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| H A D | README_P9.txt | 196 - Round to Odd of QP Add/Divide/Multiply/Subtract/Square-Root:
245 - Round to Odd of QP (Negative) Multiply-{Add/Subtract}:
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| /llvm-project-15.0.7/llvm/lib/Target/AArch64/ |
| H A D | AArch64A57FPLoadBalancing.cpp | 102 enum class Color { Even, Odd }; enumerator
261 return OverrideBalance == 1 ? Color::Even : Color::Odd; in getPreferredColor()
465 Color PreferredColor = Parity < 0 ? Color::Even : Color::Odd; in colorChainSet()
490 PreferredColor = Parity < 0 ? Color::Even : Color::Odd; in colorChainSet()
717 return Color::Odd; in getColor()
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| /llvm-project-15.0.7/llvm/test/CodeGen/ARM/ |
| H A D | regpair_hint_phys.ll | 2 ; ARM target used to fail an assertion if RegPair{Odd|Even} hint pointed to a
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| /llvm-project-15.0.7/lldb/include/lldb/Host/ |
| H A D | Terminal.h | 25 Odd, enumerator
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| /llvm-project-15.0.7/llvm/lib/Target/AMDGPU/ |
| H A D | SIRegisterInfo.h | 369 uint64_t Odd = Mask & 0x5555555555555555ULL; in getNumCoveredRegs() local
370 return countPopulation(Odd); in getNumCoveredRegs()
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| /llvm-project-15.0.7/llvm/test/MC/RISCV/ |
| H A D | rv32zdinx-invalid.s | 3 # Unsupport Odd Registers in RV32
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| /llvm-project-15.0.7/llvm/test/tools/obj2yaml/ELF/ |
| H A D | linker-options.yaml | 63 ## 3) Odd number of strings in the section.
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| /llvm-project-15.0.7/llvm/test/CodeGen/AArch64/ |
| H A D | urem-seteq-vec-splat.ll | 4 ; Odd divisor
51 ; Odd divisor
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| H A D | srem-seteq-vec-splat.ll | 4 ; Odd divisor
57 ; Odd divisor
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| H A D | urem-seteq.ll | 5 ; Odd divisors
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| H A D | srem-seteq.ll | 5 ; Odd divisors
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| /llvm-project-15.0.7/lldb/source/Host/common/ |
| H A D | Terminal.cpp | 338 if (parity == Parity::Odd || parity == Parity::Mark) in SetParity()
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| H A D | File.cpp | 783 .Case("odd", Terminal::Parity::Odd) in OptionsFromURL()
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| /llvm-project-15.0.7/lldb/unittests/Host/posix/ |
| H A D | TerminalTest.cpp | 156 ASSERT_THAT_ERROR(m_term.SetParity(Terminal::Parity::Odd), llvm::Succeeded()); in TEST_F()
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| /llvm-project-15.0.7/llvm/lib/Target/RISCV/ |
| H A D | RISCVSystemOperands.td | 282 // pmpcfg0-pmpcfg15 at 0x3A0-0x3AF. Odd-numbered registers are RV32-only.
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| /llvm-project-15.0.7/llvm/lib/Target/Hexagon/ |
| H A D | HexagonBitTracker.cpp | 295 uint16_t BW, bool Odd) -> BT::RegisterCell { in evaluate() argument
296 uint16_t I = Odd, Ws = Rs.width(); in evaluate()
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| /llvm-project-15.0.7/llvm/test/CodeGen/X86/ |
| H A D | urem-seteq-vec-splat.ll | 8 ; Odd divisor
137 ; Odd divisor
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| H A D | urem-seteq.ll | 6 ; Odd divisors
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| H A D | srem-seteq.ll | 6 ; Odd divisors
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| H A D | srem-seteq-vec-splat.ll | 8 ; Odd divisor
149 ; Odd divisor
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| /llvm-project-15.0.7/llvm/lib/Target/AArch64/MCTargetDesc/ |
| H A D | AArch64InstPrinter.cpp | 1339 unsigned Odd = MRI.getSubReg(Reg, Subo); in printGPRSeqPairsClassOperand() local
1340 O << getRegisterName(Even) << ", " << getRegisterName(Odd); in printGPRSeqPairsClassOperand()
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