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/llvm-project-15.0.7/llvm/test/CodeGen/Mips/GlobalISel/instruction-select/
H A Dfloat_constants.mir20 ; FP32: [[ORi:%[0-9]+]]:gpr32 = ORi [[LUi]], 63572
21 ; FP32: [[MTC1_:%[0-9]+]]:fgr32 = MTC1 [[ORi]]
26 ; FP64: [[ORi:%[0-9]+]]:gpr32 = ORi [[LUi]], 63572
27 ; FP64: [[MTC1_:%[0-9]+]]:fgr32 = MTC1 [[ORi]]
45 ; FP32: [[ORi:%[0-9]+]]:gpr32 = ORi [[LUi]], 48906
47 ; FP32: [[ORi1:%[0-9]+]]:gpr32 = ORi [[LUi1]], 22377
48 ; FP32: [[BuildPairF64_:%[0-9]+]]:afgr64 = BuildPairF64 [[ORi1]], [[ORi]]
53 ; FP64: [[ORi:%[0-9]+]]:gpr32 = ORi [[LUi]], 48906
55 ; FP64: [[ORi1:%[0-9]+]]:gpr32 = ORi [[LUi1]], 22377
56 ; FP64: [[BuildPairF64_64_:%[0-9]+]]:fgr64 = BuildPairF64_64 [[ORi1]], [[ORi]]
H A Djump_table_and_brjt.mir79 ; MIPS32: [[ORi:%[0-9]+]]:gpr32 = ORi $zero, 7
80 ; MIPS32: [[ORi1:%[0-9]+]]:gpr32 = ORi $zero, 3
81 ; MIPS32: [[ORi2:%[0-9]+]]:gpr32 = ORi $zero, 2
82 ; MIPS32: [[ORi3:%[0-9]+]]:gpr32 = ORi $zero, 1
83 ; MIPS32: [[ORi4:%[0-9]+]]:gpr32 = ORi $zero, 0
85 ; MIPS32: [[ORi5:%[0-9]+]]:gpr32 = ORi $zero, 0
113 ; MIPS32: [[ORi6:%[0-9]+]]:gpr32 = ORi $zero, 8
146 ; MIPS32_PIC: [[ORi:%[0-9]+]]:gpr32 = ORi $zero, 7
147 ; MIPS32_PIC: [[ORi1:%[0-9]+]]:gpr32 = ORi $zero, 3
148 ; MIPS32_PIC: [[ORi2:%[0-9]+]]:gpr32 = ORi $zero, 2
[all …]
H A Dconstants.mir37 ; MIPS32: [[ORi:%[0-9]+]]:gpr32 = ORi $zero, 32768
38 ; MIPS32: $v0 = COPY [[ORi]]
72 ; MIPS32: [[ORi:%[0-9]+]]:gpr32 = ORi [[LUi]], 3085
73 ; MIPS32: $v0 = COPY [[ORi]]
H A Dbrindirect.mir29 ; MIPS32: [[ORi:%[0-9]+]]:gpr32 = ORi $zero, 1
30 ; MIPS32: [[ORi1:%[0-9]+]]:gpr32 = ORi $zero, 0
36 ; MIPS32: $v0 = COPY [[ORi]]
H A Dsitofp_and_uitofp.mir83 ; FP32: [[ORi:%[0-9]+]]:gpr32 = ORi $zero, 0
84 ; FP32: [[BuildPairF64_1:%[0-9]+]]:afgr64 = BuildPairF64 [[ORi]], [[LUi1]]
94 ; FP64: [[ORi:%[0-9]+]]:gpr32 = ORi $zero, 0
95 ; FP64: [[BuildPairF64_64_1:%[0-9]+]]:fgr64 = BuildPairF64_64 [[ORi]], [[LUi1]]
H A Dgloal_address.mir23 ; MIPS32: [[ORi:%[0-9]+]]:gpr32 = ORi [[LUi1]], 722
24 ; MIPS32: [[ORi1:%[0-9]+]]:gpr32 = ORi $zero, 0
27 ; MIPS32: $a1 = COPY [[ORi]]
H A Dload_store_fold.mir78 ; MIPS32: [[ORi:%[0-9]+]]:gpr32 = ORi $zero, 32768
79 ; MIPS32: [[ADDu:%[0-9]+]]:gpr32 = ADDu [[COPY1]], [[ORi]]
105 ; MIPS32: [[ORi:%[0-9]+]]:gpr32 = ORi [[LUi]], 32767
106 ; MIPS32: [[ADDu:%[0-9]+]]:gpr32 = ADDu [[COPY]], [[ORi]]
H A Dadd.mir94 ; MIPS32: [[ORi:%[0-9]+]]:gpr32 = ORi $zero, 65535
95 ; MIPS32: [[ADDu:%[0-9]+]]:gpr32 = ADDu [[COPY]], [[ORi]]
H A Dvar_arg.mir81 ; MIPS32: [[ORi:%[0-9]+]]:gpr32 = ORi $zero, 4
82 ; MIPS32: [[ADDu:%[0-9]+]]:gpr32 = ADDu [[LW1]], [[ORi]]
H A Dfcmp.mir53 ; FP32: [[ORi:%[0-9]+]]:gpr32 = ORi $zero, 0
54 ; FP32: $v0 = COPY [[ORi]]
58 ; FP64: [[ORi:%[0-9]+]]:gpr32 = ORi $zero, 0
59 ; FP64: $v0 = COPY [[ORi]]
609 ; FP32: [[ORi:%[0-9]+]]:gpr32 = ORi $zero, 0
610 ; FP32: $v0 = COPY [[ORi]]
614 ; FP64: [[ORi:%[0-9]+]]:gpr32 = ORi $zero, 0
615 ; FP64: $v0 = COPY [[ORi]]
H A Dbitwise.mir130 ; MIPS32: [[ORi:%[0-9]+]]:gpr32 = ORi [[COPY]], 65535
131 ; MIPS32: $v0 = COPY [[ORi]]
/llvm-project-15.0.7/llvm/tools/llvm-exegesis/lib/Mips/
H A DTarget.cpp75 unsigned ORi, LUi, SLL; in loadImmediate() local
78 ORi = Mips::ORi; in loadImmediate()
83 ORi = Mips::ORi64; in loadImmediate()
89 return {MCInstBuilder(ORi) in loadImmediate()
102 MCInstBuilder(ORi) in loadImmediate()
121 MCInstBuilder(ORi) in loadImmediate()
/llvm-project-15.0.7/llvm/lib/Target/Mips/
H A DMipsAnalyzeImmediate.cpp41 AddInstr(SeqLs, Inst(ORi, Imm & 0xffffULL)); in GetInstSeqLsORi()
135 ORi = Mips::ORi; in Analyze()
140 ORi = Mips::ORi64; in Analyze()
H A DMipsAnalyzeImmediate.h60 unsigned ADDiu, ORi, SLL, LUi; variable
H A DMipsInstructionSelector.cpp150 B.buildInstr(Mips::ORi, {DestReg}, {Register(Mips::ZERO)}) in materialize32BitImm()
171 MachineInstr *ORi = B.buildInstr(Mips::ORi, {DestReg}, {LUiReg}) in materialize32BitImm() local
175 if (!constrainSelectedInstRegOperands(*ORi, TII, TRI, RBI)) in materialize32BitImm()
H A DMipsSEISelDAGToDAG.cpp1181 Res = CurDAG->getMachineNode(Mips::ORi, DL, MVT::i32, in trySelect()
1204 Res = CurDAG->getMachineNode(Mips::ORi, DL, MVT::i32, in trySelect()
1273 Res = CurDAG->getMachineNode(Mips::ORi, DL, MVT::i32, in trySelect()
1281 HiRes = CurDAG->getMachineNode(Mips::ORi, DL, MVT::i32, in trySelect()
H A DMipsFastISel.cpp368 emitInst(Mips::ORi, ResultReg).addReg(Mips::ZERO).addImm(Imm); in materialize32BitInt()
377 emitInst(Mips::ORi, ResultReg).addReg(TmpReg).addImm(Lo); in materialize32BitInt()
H A DMipsScheduleP5600.td224 def : InstRW<[P5600WriteEitherALU], (instrs ADD, ADDi, ADDiu, ANDi, ORi, ROTR,
H A DMipsInstrInfo.td2035 def ORi : MMRel, StdMMR6Rel,
2803 defm : OneOrTwoOperandMacroImmediateAlias<"or", ORi>, ISA_MIPS1, GPR_32;
3136 defm : MaterializeImms<i32, ZERO, ADDiu, LUi, ORi>, ISA_MIPS1;
H A DMipsScheduleGeneric.td49 NOR, OR, ORi, ROTR, ROTRV, SEB, SEH, SLL,
H A DMipsISelLowering.cpp1799 BuildMI(BB, DL, TII->get(Mips::ORi), MaskUpper) in emitAtomicBinaryPartword()
1986 BuildMI(BB, DL, TII->get(Mips::ORi), MaskUpper) in emitAtomicCmpSwapPartword()
/llvm-project-15.0.7/llvm/unittests/tools/llvm-exegesis/Mips/
H A DTargetTest.cpp47 const unsigned ORi = IsGPR32 ? Mips::ORi : Mips::ORi64; in IsLoadLow16BitImm() local
48 return AllOf(OpcodeIs(ORi), in IsLoadLow16BitImm()
/llvm-project-15.0.7/llvm/test/MC/Mips/
H A Dinstalias-imm-expanding.s474 # MIPS-NEXT: # <MCInst #{{[0-9]+}} ORi
479 # MIPS-NEXT: # <MCInst #{{[0-9]+}} ORi
531 # MIPS-NEXT: # <MCInst #{{[0-9]+}} ORi
536 # MIPS-NEXT: # <MCInst #{{[0-9]+}} ORi
594 # MICROMIPS-NEXT: # <MCInst #{{[0-9]+}} ORi
633 # MICROMIPS-NEXT: # <MCInst #{{[0-9]+}} ORi
746 # MICROMIPS-NEXT: # <MCInst #{{[0-9]+}} ORi
788 # MICROMIPS-NEXT: # <MCInst #{{[0-9]+}} ORi
/llvm-project-15.0.7/llvm/test/CodeGen/Mips/cstmaterialization/
H A Disel-materialization.ll27 ; MIPS: t{{[0-9]+}}: i32 = ORi t[[A]], TargetConstant:i32<2>
/llvm-project-15.0.7/llvm/lib/Target/Mips/AsmParser/
H A DMipsAsmParser.cpp2565 case Mips::ORi: case Mips::ORi_MM: case Mips::ORi64: in tryExpandInstruction()
2763 TOut.emitRRI(Mips::ORi, TmpReg, ZeroReg, ImmValue, IDLoc, STI); in loadImmediate()
2787 TOut.emitRRI(Mips::ORi, TmpReg, ZeroReg, Bits31To16, IDLoc, STI); in loadImmediate()
2790 TOut.emitRRI(Mips::ORi, TmpReg, TmpReg, Bits15To0, IDLoc, STI); in loadImmediate()
2798 TOut.emitRRI(Mips::ORi, TmpReg, TmpReg, Bits15To0, IDLoc, STI); in loadImmediate()
2816 TOut.emitRRI(Mips::ORi, TmpReg, ZeroReg, Bits, IDLoc, STI); in loadImmediate()
2844 TOut.emitRRI(Mips::ORi, TmpReg, TmpReg, ImmChunk, IDLoc, STI); in loadImmediate()
4353 TOut.emitRRI(Mips::ORi, ATReg, ThirdReg, 0x3, IDLoc, STI); in expandTrunc()
4794 case Mips::ORi: in expandAliasImmediate()