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Searched refs:NumSuccs (Results 1 – 10 of 10) sorted by relevance

/llvm-project-15.0.7/llvm/lib/CodeGen/
H A DScheduleDAG.cpp141 assert(N->NumSuccs < std::numeric_limits<unsigned>::max() && in addPred()
144 ++N->NumSuccs; in addPred()
191 assert(N->NumSuccs > 0 && "NumSuccs will underflow!"); in removePred()
193 --N->NumSuccs; in removePred()
395 if (SUnit.NumPreds == 0 && SUnit.NumSuccs == 0) { in VerifyScheduledDAG()
H A DScheduleDAGPrinter.cpp34 return (Node->NumPreds > 10 || Node->NumSuccs > 10); in isNodeHidden()
H A DScheduleDAGInstrs.cpp872 if (SU->NumSuccs == 0 && SU->Latency > 1 && (HasVRegDef || MI.mayLoad())) { in buildSchedGraph()
/llvm-project-15.0.7/llvm/lib/Transforms/Vectorize/
H A DVPlanHCFGBuilder.cpp296 unsigned NumSuccs = TI->getNumSuccessors(); in buildPlainCFG() local
298 if (NumSuccs == 1) { in buildPlainCFG()
302 } else if (NumSuccs == 2) { in buildPlainCFG()
/llvm-project-15.0.7/llvm/lib/Target/Hexagon/
H A DHexagonCFGOptimizer.cpp155 unsigned NumSuccs = MBB.succ_size(); in runOnMachineFunction() local
184 if ((NumSuccs == 2) && LayoutSucc && (LayoutSucc->pred_size() == 1)) { in runOnMachineFunction()
/llvm-project-15.0.7/llvm/lib/Target/AMDGPU/
H A DGCNILPSched.cpp88 if (SU->NumSuccs == 0 && SU->NumPreds != 0) in getNodePriority()
96 if (SU->NumPreds == 0 && SU->NumSuccs != 0) in getNodePriority()
/llvm-project-15.0.7/llvm/lib/CodeGen/SelectionDAG/
H A DScheduleDAGRRList.cpp2059 if (SU->NumSuccs == 0 && SU->NumPreds != 0) in getNodePriority()
2066 if (SU->NumPreds == 0 && SU->NumSuccs != 0) in getNodePriority()
2127 if (!N->isMachineOpcode() || !SU->NumSuccs) in MayReduceRegPressure()
2173 if (!N || !N->isMachineOpcode() || !SU->NumSuccs) in RegPressureDiff()
2321 if (SU->NumSuccs && N->isMachineOpcode()) { in unscheduledNode()
2740 if (SU->NumPreds == 0 && SU->NumSuccs != 0) in canEnableCoalescing()
2962 if (SU.NumSuccs != 0) in PrescheduleNodesWithMultipleUses()
3012 if (PredSU->NumSuccs == 1) in PrescheduleNodesWithMultipleUses()
3028 if (PredSuccSU->NumSuccs == 0) in PrescheduleNodesWithMultipleUses()
/llvm-project-15.0.7/llvm/lib/Transforms/Utils/
H A DCodeLayout.cpp643 size_t NumSuccs = SuccNodes[SrcBB].size(); in mergeColdChains() local
644 for (size_t Idx = 0; Idx < NumSuccs; Idx++) { in mergeColdChains()
645 auto DstBB = SuccNodes[SrcBB][NumSuccs - Idx - 1]; in mergeColdChains()
/llvm-project-15.0.7/llvm/include/llvm/CodeGen/
H A DScheduleDAG.h267 unsigned NumSuccs = 0; ///< # of SDep::Data sucss. variable
/llvm-project-15.0.7/polly/lib/Analysis/
H A DScopBuilder.cpp1039 unsigned NumSuccs = RN->isSubRegion() ? 1 : TI->getNumSuccessors(); in propagateInvalidStmtDomains() local
1040 for (unsigned u = 0; u < NumSuccs; u++) { in propagateInvalidStmtDomains()