| /llvm-project-15.0.7/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeTypesGeneric.cpp | 230 SDValue NewVec = DAG.getNode(ISD::BITCAST, dl, in ExpandRes_EXTRACT_VECTOR_ELT() local
239 Lo = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, NewVT, NewVec, Idx); in ExpandRes_EXTRACT_VECTOR_ELT()
243 Hi = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, NewVT, NewVec, Idx); in ExpandRes_EXTRACT_VECTOR_ELT()
397 SDValue NewVec = DAG.getBuildVector(NewVecVT, dl, NewElts); in ExpandOp_BUILD_VECTOR() local
400 return DAG.getNode(ISD::BITCAST, dl, VecVT, NewVec); in ExpandOp_BUILD_VECTOR()
425 SDValue NewVec = DAG.getNode(ISD::BITCAST, dl, in ExpandOp_INSERT_VECTOR_ELT() local
435 NewVec = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, NewVecVT, NewVec, Lo, Idx); in ExpandOp_INSERT_VECTOR_ELT()
439 NewVec = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, NewVecVT, NewVec, Hi, Idx); in ExpandOp_INSERT_VECTOR_ELT()
442 return DAG.getNode(ISD::BITCAST, dl, VecVT, NewVec); in ExpandOp_INSERT_VECTOR_ELT()
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| H A D | LegalizeDAG.cpp | 4948 SDValue NewVec = DAG.getBuildVector(MidVT, SL, NewOps); in PromoteNode() local
4949 Results.push_back(DAG.getNode(ISD::BITCAST, SL, EltVT, NewVec)); in PromoteNode()
4987 SDValue NewVec = CastVec; in PromoteNode() local
4995 NewVec = DAG.getNode(ISD::INSERT_VECTOR_ELT, SL, NVT, in PromoteNode()
4996 NewVec, Elt, InEltIdx); in PromoteNode()
4999 Results.push_back(DAG.getNode(ISD::BITCAST, SL, OVT, NewVec)); in PromoteNode()
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| H A D | LegalizeVectorTypes.cpp | 4604 SDValue NewVec; in WidenVecRes_BITCAST() local
4614 NewVec = DAG.getNode(ISD::CONCAT_VECTORS, dl, NewInVT, Ops); in WidenVecRes_BITCAST()
4616 NewVec = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, NewInVT, InOp); in WidenVecRes_BITCAST()
4618 return DAG.getNode(ISD::BITCAST, dl, WidenVT, NewVec); in WidenVecRes_BITCAST()
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| /llvm-project-15.0.7/llvm/lib/CodeGen/GlobalISel/ |
| H A D | LegalizerHelper.cpp | 2774 auto NewVec = MIRBuilder.buildBuildVector(MidTy, NewOps); in bitcastExtractVectorElt() local
2775 MIRBuilder.buildBitcast(Dst, NewVec); in bitcastExtractVectorElt()
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| /llvm-project-15.0.7/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 8626 SDValue NewVec = DAG.getNode(ARMISD::BUILD_VECTOR, dl, MVT::v4f32, Parts); in LowerVECTOR_SHUFFLEUsingMovs() local
8627 return DAG.getBitcast(VT, NewVec); in LowerVECTOR_SHUFFLEUsingMovs()
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| /llvm-project-15.0.7/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 49002 SDValue NewVec = DAG.getNode(ISD::CONCAT_VECTORS, dl, RegVT, Load1, Load2); in combineLoad() local
49003 return DCI.CombineTo(N, NewVec, TF, true); in combineLoad()
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