Searched refs:NewV2 (Results 1 – 2 of 2) sorted by relevance
| /llvm-project-15.0.7/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 17198 SDValue NewV2 = DAG.getVectorShuffle(VT, DL, V1, V2, NewMask); in lowerShuffleAsLanePermuteAndRepeatedMask() local
17202 if (isa<ShuffleVectorSDNode>(NewV2) && in lowerShuffleAsLanePermuteAndRepeatedMask()
17203 cast<ShuffleVectorSDNode>(NewV2)->getMask() == Mask) in lowerShuffleAsLanePermuteAndRepeatedMask()
17213 return DAG.getVectorShuffle(VT, DL, NewV1, NewV2, NewMask); in lowerShuffleAsLanePermuteAndRepeatedMask()
38244 SDValue NewV2 = V2; in combineX86ShuffleChain() local
38252 NewV2 = CanonicalizeShuffleInput(ShuffleSrcVT, NewV2); in combineX86ShuffleChain()
38253 Res = DAG.getNode(Shuffle, DL, ShuffleVT, NewV1, NewV2); in combineX86ShuffleChain()
38258 NewV2 = V2; in combineX86ShuffleChain()
38260 AllowIntDomain, NewV1, NewV2, DL, DAG, in combineX86ShuffleChain()
38266 NewV2 = CanonicalizeShuffleInput(ShuffleVT, NewV2); in combineX86ShuffleChain()
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| /llvm-project-15.0.7/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 9009 SDValue NewV2 = PromoteMVEPredVector(dl, V2, Op2VT, DAG); in LowerCONCAT_VECTORS_i1() local
9037 ConVec = ExtractInto(NewV2, ConVec, j); in LowerCONCAT_VECTORS_i1()
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