Searched refs:NewLo (Results 1 – 4 of 4) sorted by relevance
| /llvm-project-15.0.7/llvm/lib/Target/PowerPC/ |
| H A D | PPCExpandAtomicPseudoInsts.cpp | 236 Register NewLo = MI.getOperand(6).getReg(); in expandAtomicCmpSwap128() local
285 NewHi, NewLo); in expandAtomicCmpSwap128()
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| H A D | PPCISelLowering.cpp | 18182 Value *NewLo = Builder.CreateTrunc(NewVal, Int64Ty, "new_lo"); in emitMaskedAtomicCmpXchgIntrinsic() local
18189 Builder.CreateCall(IntCmpXchg, {Addr, CmpLo, CmpHi, NewLo, NewHi}); in emitMaskedAtomicCmpXchgIntrinsic()
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| /llvm-project-15.0.7/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeFloatTypes.cpp | 1750 SDValue NewLo = DAG.getConstantFP( in ExpandFloatRes_XINT_TO_FP() local
1754 {Chain, Hi, NewLo}, Flags); in ExpandFloatRes_XINT_TO_FP()
1758 Lo = DAG.getNode(ISD::FADD, dl, VT, Hi, NewLo); in ExpandFloatRes_XINT_TO_FP()
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| /llvm-project-15.0.7/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 11688 SDValue NewLo = DAG.getNode(ISD::INSERT_SUBVECTOR, DL, HalfVT, Lo, Vec1, in LowerINSERT_SUBVECTOR() local
11690 return DAG.getNode(AArch64ISD::UZP1, DL, VT, NewLo, Hi); in LowerINSERT_SUBVECTOR()
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