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Searched refs:Narrow (Results 1 – 19 of 19) sorted by relevance

/llvm-project-15.0.7/llvm/lib/Target/X86/
H A DX86InstrAVX512.td3181 def : Pat<(Narrow.KVT (Frag:$cc (Narrow.VT Narrow.RC:$src1),
3189 def : Pat<(Narrow.KVT (and Narrow.KRC:$mask,
3190 (Narrow.KVT (Frag_su:$cc (Narrow.VT Narrow.RC:$src1),
3205 def : Pat<(Narrow.KVT (Frag:$cc (Narrow.VT Narrow.RC:$src1),
3212 def : Pat<(Narrow.KVT (and Narrow.KRC:$mask,
3231 def : Pat<(Narrow.KVT (and Narrow.KRC:$mask,
3246 def : Pat<(Narrow.KVT (X86cmpm (Narrow.VT Narrow.RC:$src1),
3264 def : Pat<(Narrow.KVT (X86cmpm (Narrow.VT Narrow.RC:$src1),
3280 def : Pat<(Narrow.KVT (X86cmpm (Narrow.VT (Narrow.BroadcastLdFrag addr:$src2)),
3721 def : Pat<(Narrow.VT (vselect (Narrow.KVT Narrow.KRCWM:$mask),
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H A DX86ISelLowering.cpp47442 SDValue Narrow = N->getOperand(0); in PromoteMaskArithmetic() local
47443 EVT NarrowVT = Narrow.getValueType(); in PromoteMaskArithmetic()
47446 SDValue Op = PromoteMaskArithmetic(Narrow.getNode(), VT, DAG, 0); in PromoteMaskArithmetic()
/llvm-project-15.0.7/llvm/docs/
H A DBugpointRedesign.md19 ### Narrow focus: test-case reduction
/llvm-project-15.0.7/llvm/test/Transforms/PhaseOrdering/X86/
H A Dshuffle-inseltpoison.ll258 ; TODO: Narrow and squash shuffles?
274 ; TODO: Narrow and squash shuffles?
306 ; TODO: Narrow and squash shuffles?
H A Dshuffle.ll258 ; TODO: Narrow and squash shuffles?
274 ; TODO: Narrow and squash shuffles?
306 ; TODO: Narrow and squash shuffles?
/llvm-project-15.0.7/llvm/test/CodeGen/Thumb2/
H A Dv8_IT_6.ll3 ; Narrow tORR cannot be predicated and set CPSR at the same time!
/llvm-project-15.0.7/llvm/test/MC/Disassembler/AArch64/
H A Dneon-instructions.txt1427 # Narrow
1784 # Scalar Signed Saturating Extract Unsigned Narrow
1794 # Scalar Signed Saturating Extract Signed Narrow
1804 # Scalar Unsigned Saturating Extract Narrow
1916 # Signed Saturating Shift Right Narrow (Immediate)
1926 # Unsigned Saturating Shift Right Narrow (Immediate)
1936 # Signed Saturating Rounded Shift Right Narrow (Immediate)
1946 # Unsigned Saturating Rounded Shift Right Narrow (Immediate)
1956 # Signed Saturating Shift Right Unsigned Narrow (Immediate)
1966 # Signed Saturating Rounded Shift Right Unsigned Narrow (Immediate)
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/llvm-project-15.0.7/llvm/lib/Target/AArch64/
H A DAArch64ISelDAGToDAG.cpp1722 bool Narrow = VT.getSizeInBits() == 64; in SelectLoadLane() local
1727 if (Narrow) in SelectLoadLane()
1748 if (Narrow) in SelectLoadLane()
1761 bool Narrow = VT.getSizeInBits() == 64; in SelectPostLoadLane() local
1766 if (Narrow) in SelectPostLoadLane()
1793 Narrow ? NarrowVector(SuperReg, *CurDAG) : SuperReg); in SelectPostLoadLane()
1801 if (Narrow) in SelectPostLoadLane()
1816 bool Narrow = VT.getSizeInBits() == 64; in SelectStoreLane() local
1821 if (Narrow) in SelectStoreLane()
1845 bool Narrow = VT.getSizeInBits() == 64; in SelectPostStoreLane() local
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H A DAArch64ISelLowering.cpp11721 SDValue Narrow; in LowerINSERT_SUBVECTOR() local
11724 Narrow = DAG.getNode(AArch64ISD::UZP1, DL, NarrowVT, Vec1, HiVec0); in LowerINSERT_SUBVECTOR()
11729 Narrow = DAG.getNode(AArch64ISD::UZP1, DL, NarrowVT, LoVec0, Vec1); in LowerINSERT_SUBVECTOR()
11732 return getSVESafeBitCast(VT, Narrow, DAG); in LowerINSERT_SUBVECTOR()
/llvm-project-15.0.7/llvm/test/Transforms/LoopStrengthReduce/
H A Dillegal-addr-modes.ll11 ; "[LSR] Narrow search space by filtering non-optimal formulae with the
/llvm-project-15.0.7/clang/include/clang/Basic/
H A Darm_neon.td1346 // Signed/Unsigned Saturating Shift Right Narrow (Immediate)
1348 // Signed/Unsigned Saturating Rounded Shift Right Narrow (Immediate)
1350 // Signed Saturating Shift Right Unsigned Narrow (Immediate)
1352 // Signed Saturating Rounded Shift Right Unsigned Narrow (Immediate)
1546 // Scalar Signed Saturating Extract Unsigned Narrow
1550 // Scalar Signed Saturating Extract Narrow
1554 // Scalar Unsigned Saturating Extract Narrow
/llvm-project-15.0.7/llvm/unittests/ADT/
H A DAPIntTest.cpp2807 APInt Narrow = N1.umul_ov(N2, Overflow); in TEST() local
2809 EXPECT_EQ(Wide.trunc(Bits), Narrow); in TEST()
2810 EXPECT_EQ(Narrow.zext(2 * Bits) != Wide, Overflow); in TEST()
2820 APInt Narrow = N1.smul_ov(N2, Overflow); in TEST() local
2822 EXPECT_EQ(Wide.trunc(Bits), Narrow); in TEST()
2823 EXPECT_EQ(Narrow.sext(2 * Bits) != Wide, Overflow); in TEST()
/llvm-project-15.0.7/llvm/test/Transforms/InstCombine/
H A Dshuffle-select-narrow-inseltpoison.ll4 ; Narrow the select operands to eliminate the existing shuffles and replace a wide select with a na…
H A Dshuffle-select-narrow.ll4 ; Narrow the select operands to eliminate the existing shuffles and replace a wide select with a na…
/llvm-project-15.0.7/flang/lib/Lower/
H A DIntrinsicCall.cpp1316 enum class Conversion { Forbidden, None, Narrow, Extend }; enumerator
1325 case Conversion::Narrow: in addArgumentDistance()
1341 case Conversion::Narrow: in addResultDistance()
1370 return fromIntTy.getWidth() > toIntTy.getWidth() ? Conversion::Narrow in conversionBetweenTypes()
1377 ? Conversion::Narrow in conversionBetweenTypes()
1385 ? Conversion::Narrow in conversionBetweenTypes()
/llvm-project-15.0.7/llvm/lib/Target/ARM/
H A DARMInstrNEON.td2570 // Narrow 2-register operations.
2579 // Narrow 2-register intrinsics.
3232 // Narrow shift by immediate.
4223 // Neon Shift Narrow operations,
4293 // VADDHN : Vector Add and Narrow Returning High Half (D = Q + Q)
5101 // VSUBHN : Vector Subtract and Narrow Returning High Half (D = Q - Q)
6018 // VSHRN : Vector Shift Right and Narrow
6045 // VRSHRN : Vector Rounding Shift Right and Narrow
6063 // VQSHRN : Vector Saturating Shift Right and Narrow
6069 // VQSHRUN : Vector Saturating Shift Right and Narrow (Unsigned)
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H A DARMScheduleSwift.td577 // 4.2.31 Advanced SIMD, Add and Shift with Narrow
/llvm-project-15.0.7/llvm/include/llvm/IR/
H A DIntrinsicsAArch64.td427 // Vector Saturating Narrow
433 // Vector Saturating Extract and Unsigned Narrow
/llvm-project-15.0.7/clang/unittests/Format/
H A DFormatTest.cpp5758 FormatStyle Narrow = getLLVMStyleWithColumns(11); in TEST_F() local
5760 format("#define A \\\nint i;\\\n int j;", Narrow)); in TEST_F()
5778 format("#define A \\\r\nint i;\\\r\n int j;", Narrow)); in TEST_F()