Searched refs:N8 (Results 1 – 10 of 10) sorted by relevance
35 ; CHECK-NEXT: [def-use] to [[N8:0x[0-9a-f]*]]42 ; CHECK-NEXT: [def-use] to [[N8]]49 ; CHECK-NEXT: [def-use] to [[N8]]51 ; CHECK: Node Address:[[N8]]:pi-block139 ; CHECK-NEXT: [def-use] to [[N8:0x[0-9a-f]*]]148 ; CHECK-NEXT: [memory] to [[N8]]161 ; CHECK-NEXT: [def-use] to [[N8]]163 ; CHECK: Node Address:[[N8]]:single-instruction
43 ; CHECK: Node Address:[[N8:0x[0-9a-f]*]]:single-instruction128 ; CHECK-NEXT: [def-use] to [[N8:0x[0-9a-f]*]]136 ; CHECK-NEXT: [def-use] to [[N8]]138 ; CHECK: Node Address:[[N8]]:single-instruction
30 ; CHECK-NEXT: [def-use] to [[N8:0x[0-9a-f]*]]76 ; CHECK-NEXT: [def-use] to [[N8]]78 ; CHECK: Node Address:[[N8]]:single-instruction227 ; CHECK: Node Address:[[N8:0x[0-9a-f]*]]:pi-block
11 namespace N8 { } namespace67 int &ir1 = N8::f(17); in testMergedMerged()
38 namespace N8 {
49 namespace N8 {
83 %N8 = mul i32 %N, 484 tail call void @llvm.memcpy.p0i8.p0i8.i32(i8* %d8, i8* %s8, i32 %N8, i1 false)
95 // CHECK-DAG: Node[[N8:(0x)?[0-9a-fA-F]+]] [shape=record,label="{No partitioner|Rule1}"]129 // CHECK-DAG: Node[[N7]] -> Node[[N8]] [label="#0 MyTarget::MOV"]
134 namespace N8 { namespace
182 ; CHECK-NEXT: [[N8:%.*]] = shl i64 [[N:%.*]], 3183 ; CHECK-NEXT: [[SHAMT:%.*]] = and i64 [[N8]], 56