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Searched refs:MoveReg (Results 1 – 4 of 4) sorted by relevance

/llvm-project-15.0.7/llvm/include/llvm/MC/
H A DMCInstrDesc.h162 MoveReg, enumerator
282 bool isMoveReg() const { return Flags & (1ULL << MCID::MoveReg); } in isMoveReg()
/llvm-project-15.0.7/llvm/lib/Target/ARM/
H A DARMFastISel.cpp394 Register MoveReg = createResultReg(TLI.getRegClassFor(VT)); in ARMMoveToFPReg() local
396 TII.get(ARM::VMOVSR), MoveReg) in ARMMoveToFPReg()
398 return MoveReg; in ARMMoveToFPReg()
404 Register MoveReg = createResultReg(TLI.getRegClassFor(VT)); in ARMMoveToIntReg() local
406 TII.get(ARM::VMOVRS), MoveReg) in ARMMoveToIntReg()
408 return MoveReg; in ARMMoveToIntReg()
995 Register MoveReg = createResultReg(TLI.getRegClassFor(MVT::f32)); in ARMEmitLoad() local
997 TII.get(ARM::VMOVSR), MoveReg) in ARMEmitLoad()
999 ResultReg = MoveReg; in ARMEmitLoad()
1103 TII.get(ARM::VMOVRS), MoveReg) in ARMEmitStore()
[all …]
/llvm-project-15.0.7/llvm/lib/Target/PowerPC/
H A DPPCFrameLowering.cpp2494 unsigned MoveReg = PPC::R12; in restoreCRs() local
2498 addFrameReference(BuildMI(*MF, DL, TII.get(PPC::LWZ), MoveReg), in restoreCRs()
2504 .addReg(MoveReg, getKillRegState(!CR3Spilled && !CR4Spilled))); in restoreCRs()
2508 .addReg(MoveReg, getKillRegState(!CR4Spilled))); in restoreCRs()
2512 .addReg(MoveReg, getKillRegState(true))); in restoreCRs()
/llvm-project-15.0.7/llvm/include/llvm/CodeGen/
H A DMachineInstr.h909 return hasProperty(MCID::MoveReg, Type);