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Searched refs:MoveImm (Results 1 – 5 of 5) sorted by relevance

/llvm-project-15.0.7/llvm/include/llvm/MC/
H A DMCInstrDesc.h161 MoveImm, enumerator
342 bool isMoveImmediate() const { return Flags & (1ULL << MCID::MoveImm); } in isMoveImmediate()
/llvm-project-15.0.7/llvm/lib/Target/AMDGPU/
H A DSIFixSGPRCopies.cpp308 const MachineInstr *MoveImm, in isSafeToFoldImmIntoCopy() argument
315 if (!MoveImm->isMoveImmediate()) in isSafeToFoldImmIntoCopy()
319 TII->getNamedOperand(*MoveImm, AMDGPU::OpName::src0); in isSafeToFoldImmIntoCopy()
327 switch (MoveImm->getOpcode()) { in isSafeToFoldImmIntoCopy()
/llvm-project-15.0.7/llvm/lib/Target/VE/
H A DVEInstrInfo.td538 bit MoveImm = 0> {
557 // An instruction declared as MoveImm will be optimized in FoldImmediate
559 let isMoveImm = MoveImm;
592 Operand immOp = simm7, Operand mOp = mimm, bit MoveImm = 0> :
593 RRbm<opcStr, opc, RC, Ty, RC, Ty, OpNode, immOp, mOp, MoveImm>;
961 multiclass RMm<string opcStr, bits<8>opc, RegisterClass RC, bit MoveImm = 0> {
974 // it here. An instruction declared as MoveImm will be optimized in
976 let isMoveImm = MoveImm;
983 let cx = 0 in defm LEA : RMm<"lea", 0x06, I64, /* MoveImm */ 1>;
984 let cx = 1 in defm LEASL : RMm<"lea.sl", 0x06, I64, /* MoveImm */ 1>;
[all …]
/llvm-project-15.0.7/llvm/include/llvm/CodeGen/
H A DMachineInstr.h903 return hasProperty(MCID::MoveImm, Type);
/llvm-project-15.0.7/llvm/lib/Target/ARM/
H A DARMInstrThumb2.td2885 bit Cheap = 0, bit ReMat = 0, bit MoveImm = 0> {
2892 let isMoveImm = MoveImm;